基本介紹
- 中文名：羅正忠
- 外文名：ProfessorJen-Chung Lou
- 出生日期：1951年7月24日
- 職業：教師
- 畢業院校：加州大學柏克萊分校
- 性別：男
人物簡介,研究方向,主講課程,個人簡歷：,發表的論文（Publication List）：,發表的專利（Patent List）：,
人物簡介
羅正忠 教授
ProfessorJen-Chung Lou
 | 羅正忠博士 國立清華大學教授 國立交通大學教授 北京大學系主任 北京大學教授 北京大學碩士生導師 |
研究方向
高介電係數閘極介電質的成長與特性研究
深次微米微影製程技術
低溫選擇性矽磊晶成長技術
非揮發性記憶體組件的特性改善
高效能太陽能電池技術發展與製造
矽材料提純與分析
主講課程
《微電子理論基礎》
《矽太陽能電池材料與器件》
《積體電路工藝》
個人簡歷：
 | 1.姓名：羅正忠 Name：Jen-Chung Lou (Jesse Lou) 2.生日 : 1951年7月24日 Birthday : July 24th 1951 |
3. 教育背景：
Education :
(1) 國立清華大學物理系學士(1971-1975)
The Bachelor of Physics Department, NationalTsingHuaUniversity in Taiwan (1971-1975)
(2) 國立清華大學物理研究所碩士(1975-1977)
The Master of Physics Institute, NationalTsingHuaUniversity in Taiwan (1975-1977)
(3) 美國加州大學柏克萊分校電機工程學博士
The Ph. D of Electrical Engineering and Computer Sciences, University of California at Berkeley, USA (1986-1991)
4. 經歷：
Experiences :
(1) 國立清華大學電機系講師(1979-1983)
The Electrical Engineering Department of NationalTsingHuaUniversity, Lecturer (From August, 1979 to July, 1983)
(2) 國立清華大學電機系副教授(1983-1989)
The Electrical Engineering Department of NationalTsingHuaUniversity, Associate Professor (From August, 1983 to December, 1989)
(3) 美國加州大學柏克萊分校利物摩爾實驗室研究助理(1986-1987)
Livermore Laboratory of Berkeley, University of California, Assistant Researcher (From January, 1986 to July, 1987)
(4) 國立交通大學電子研究所副教授(1991~2009)
Institute of Electronics, NationalChiaoTungUniversity, Associate Professor (From August, 1991to July, 2009)
(5) 聯華電子公司，技術與訓練講員(1996-2004)
United Microelectronics Corp., Technical and Education Training (in October, 1996-2004)
(6) 華邦電子公司，技術與訓練講員(1996-2004)
Winbond Electronics Corp., Technical and Education Training (in September, 1996-2004)
(7) 台積電，技術與訓練講員(1997-2004)
Taiwan Semiconductor Manufacturing Company, Ltd., Technical and Education Training (in February, 1997-2004)
(8) 旺宏電子公司，技術與訓練講員(1995-2004)
Macronix International Co., Ltd., Technical and Education Training (in July, 1995-2004)
(9) 新竹科學園區，次微米培訓計畫講員(1995-2009)
The Submicron Training Program, Hsinchu Science and Industrial Park, Lecturer (in September, 1995-2009)
(10) 經濟部工業局半導體學院，協調規劃委員(1998-2008)
SemiconductorCollege, Industrial Development Bureau, Ministry of Economic Affairs, Coordination Executive (In June, 1998- 2008)
(11) 套用材料(台灣)講員(1997-2001)
Applied Materials (Taiwan), Instructor (1997-2001)
(12) 套用材料(台灣)技術顧問(1997-2001)
Applied Materials (Taiwan), Technical Consultant
(13) 工研院能資所顧問(1996-2007)
Industrial Technology and Research Institute, Consultant (1996-2007)
(14) 經濟部水資源局顧問(1999-2008)
Water Resources Agency, Ministry of Economic Affairs, Consultant (1999-2008)
(15) 台灣積體電路技術服務股份有限公司總經理(2002-2005)
Taiwan Semicon-Tech Service Company, President (2002-2005)
(16) 台灣積體電路技術服務股份有限公司總經理(2006-2008)
Taiwan Semicon-Tech Service Company, President (2006-2008)
(17) 迅能半導體董事(2007-Present)
Sooner Semiconductor Company, Director (2007-Present)
(18) 中芯國際積體電路製造（上海）有限公司，顧問(2009-2010)
SMIC (Shanghai), Advisor of CEO (2009-2010)
（19）北京大學軟體與微電子學院積體電路設計與工程系教授（2010-Present）
The Department of IC Design & Engineering of PekingUniversity
Professor (From September, 2010- Present)
(20) 台灣半導體協會, 產學推動小組主任委員（2003-2011）
TSIA, Committee of Industry and Academy Cooperation, Director （2003-2011）
5. 專長：
Specialty :
(1) 矽半導體組件製造
Silicon Semiconductor Devices Manufacturing
(2) 深次微米積體電路技術
Deep Submicron IC Technology Development
(3) 太陽電池技術與製造
Solar Cell Technology and Manufacturing
(4) 矽材料分析
Silicon Material Characterization
（5）發光二極體器件製造及特性改進
LED Fabrication and Performance Improvement
6. 學術成果：
Academic Performance :
(1) 在國際期刊及研討會上發表83篇研究論文
Publish over 83 Research Papers in International Journals and Conferences
(2) 在半導體技術領域取得20項專利(台灣、日本、美國)
Publish 20 Patents in Semiconductor Technology Area
(3) 翻譯出版5本有關積體電路及組件的大學教材
Translate 5 IC Fabrication and Devices Textbooks
7. 教授課程：
Teaching Courses :
(1) 積體電路技術
Integrated Circuit Technology
(2) 積體電路製程整合
Integration of IC Technology
(3) 半導體及物理器件
Semiconductor Physics and Devices
(4) 固態物理
SolidState Physics
(5) 電子學
Electronics
(6) 電路學
Introduction to Electric Circuits
(7) 量子力學
Quantum Mechanics
(8) 近代物理
Introduction to Modern Physics
8. 研究專題方向 :
Research Topics :
(1) 高介電係數閘極介電質的成長與特性研究
The Growth and the Characterization of High-K Dielectrics
(2) 深次微米微影製程技術
Lithography Technology Development in Deep Submicron Devices
(3) 低溫選擇性矽磊晶成長技術
The Selective Epitaxy of Silicon at Low Temperatures
(4) 非揮發性記憶體組件的特性改善
The Improvement in Characteristics of Non-Volatile Memory Devices
(5) 高效能太陽能電池技術發展與製造
Technology Development and Manufacturing of High-Efficient Solar Cells
(6) 矽材料提純與分析
The Purification and the Characterization of Silicon Materials
(7) 發光二極體的特性改良與套用
Characteristics Improvement and Applications of LEDs
9. 未來五年的工作期許：
Future Targets:
(1)建立一個完整的光電組件研發中心，加速建立中國在太陽能電池及發光二極體的自主技術
(2)建立再生能源評估及發展的研究中心，並制定各種再生能源系統的規格
(3)推動學術界與工業界密切結合的合作計畫，引導學術界積極參與工業界的研究開發(RD)以及技術發展(TD)工作
(4)推動研究生與工業界的建教合作計畫，培養學生動手能力，積極替工業界培養有用之才
(5)培養替工業界解決困難技術的積極思想，落實能夠送上生產線量產的研發成果，才是好的研發成果的觀念
發表的論文（Publication List）：
1. Degradation Mechanism of Mo/GaAs0.6P0.4 Schottky Barriers.,J. C. Lou, M. S. Lin and W. H. Su, Journal of Applied Physics, 54, 4482 (1983).
2. Electrical Properties of Mo/III-V Compounds Schottky Barriers. M. S. Lin, W. H. Su, J. C. Lou, and T. F. Lei, Japanese Journal of Applied Physics. Suppl 22-1, 397 (1982).
3. Electrical and Optical Characteristics of GaAs0.6P0.4 LEDs Fabricated by Zn Semi-closed Diffused method. J. C. Lou, M. S. Lin, J. I. Chyi, M. D. Lin, and S. Sche, Physica Status Solidi (a), 77, 741 (1983).
4. Defect Studies on Silicon Implanted GaAs. J. C. Lou, M. S. Lin, C. H. Pen, and Y. J. Chan, Proceedings of NSC. 7, 268(1983).
5. Radiation Annealing of Silicon-Implanted GaAs with a CW Xe Arc-Lamp. M. S. Lin, B. C. Hsiech , C. H. Peng, andJ. C. Lou, in Proceedings of Fourth International Conf. on Ion-Implantation, Berchtesgaden, Sep. 13-17 (1982). Spriger series in Electrophysis Vol. II. 498-503(1983).
6. The Raman Scattering Studies on the Compound Material of GaAs1-x Px. H. Chang, M. S. Lin, and J. C. Lou, Chinese Journal of Material Science, Vol, 15, No, 2 , 1(1983).
7. Characteristics of Anodic Oxide/ GaAs1-x Px (x=0.4) Interface. C. J. Hsu,J. C. Lou, M. S. Lin, and H. Chang, 1982 Proceeding of the Symposium on Electronic Devices and Materials, PP. 282-291.
8. Correlation of Ellipsometry Studied with the Electrical Properties of BF2+ Implanted Si. S. S. Gong, M. S. Lin, and J. C. Lou, 1980 Proceedings of the 6th Symposium on Electronic Materials Devices and Circuits, PP, 86-93.
9. Radiation-Enhanced Diffusion of Boron in Silicon. J. C. Lou and M.S. Lin, Chinese Journal of Material Science. Vol. 14, No. 1, PP 1-4.
10. Characteristic Study of Arsenic Implanted Buried and Epitaxial Layer of Bipolar Integrated Circuits. M. S. Lin, T. L. Lee, J. C. Lou, J. H. Lu and L.W. Yin, 1983 International Symposium on VLSI technology, Systems and Applications, edited by Paul P. Wang PP.189-193
11. The Electrical Properties of As+-Implanted SnO2 Films, J.C. Lou, and M.S. Lin, Thin Solid Films, 110, 21(1983)
12. Process Study of Chemical Vapour Deposited SnO2 Films,J.C. Lou, M.S. Lin, J.I. Chyi, and J.H. Shieh, Thin Solid Films, 106, 163(1983)
13. Studies of Deep Levels in Si Epitaxy Grown by SiCl4-H2 System. J.C. Lou, W.S. Lin, and W.S. Wang, Journal of Applied Physics. 54, 6773(1983)
14. Study of GaAs Epitaxial Films Grown by Radiation Heating MOCVD Method. C.P. Wan, M.S. Lin, andJ.C. Lou, 1983 Proceeding of the Symposium on Electronic Devices and Materials. PP.353-359
15. Carrier Concentration in P-type GaAs0.6P0.4 Deduced from the Wavelength of Plasma Minimum. C.C. Lee, M.S. Lin, andJ.C. Lou, 1983 Proceeding of the Symposium on Electronic Devices and Materials. PP.360-363
16. The Study of GranBoundaryState Density in LPCVD Polysilicon Films. R.J. Wu, M.S. Lin, and J.C. Lou, 1983 Proceeding of the Symposium on Electronic Devices and Materials. PP. 387-393
17. Heteroepitaxial Grwoth of Ge/Si by Low Pressure CVD. J.I. Chyi,J.C. Lou, M.S. Lin, and P. Ling, Proceedings of 1984 International Electronic Devices and Materials Symposium. PP.451-456
18. The Characteristic Study of ZnSe Epitaxial Layer Grown on GaAs by MOCVD. W.S. Wang, J.C. Lou, M.S. Lin and K.P. Maa, Proceedings of 1984 International Electronic Devices and Materials Symposium. PP.429-434
19. Interface Study of Mo/GaAs. P. Ling, C.G. Chang, M.S. Lin, and J.C. Lou, Proceeding of Material Research Society Symp. PP.137-144, Vol.1985
20. The Study of Molybdenum Silicide by Electron Microscopy , L.G. Yao, J.C. Lou, and P. Ling, Proceeding of 6th ROC symposium on Electron Microscopy, 1984. PP. 59-60
21. The P-N Transition of Epitaxial Hg0.7Cd0.3Te Compound Semiconductor. C. D. Chiang, S. J. Yang, J. C. Lou, Y. M. Pang, S. L. Tu, T. P. Sun, and T. B. Wu, in 1985 Proceedings of the Symposium on Electronic Devices and Materials.
22. Low Temperature Hot-Wall Selective Epitaxial Growth. C. Galewski, J. C. Lou, and W. G. Oldham, Proceeding in “Topical Research Conference on Silicon-based Epitaxial Technologies 1989”, PP.589 (1989).
23. Silicon Wafer Preparation for Low-Temperature Selective Epitaxial Growth. C. Galewski, J. C. Lou, W. G. Oldham, IEEE Trans. Semiconductor Manufacturing SM-3. 3, 93 (1990).
24. Cross-section Transmission Electron Microscopy Study of Carbon-implanted Layers in Silicon. H. Wong, J. C. Lou, and N. W. Cheung, Appl. Phys. Lett., 57 (8), 798 (1990).
25. Dichlorosilane Effects on Low-Temperature Selective Silicon Epitaxy. J. C. Lou, C. Galewski, and W. G. Oldham, Appl. Phys. Lett., 58 (1), 59 (1991).
26. The Surface Morphology of Selectively-Grown Epitaxial Silicon. J. C. Lou, W. G. Oldham, H. Kawayoshi, and P. Ling, Journal of Applied Physics, 70, 685(1991).
27. Plasma Etch Effects on Low-Temperature Selective Epitaxial Growth of Silicon.J. C. Lou, W. G. Oldham, H. Kawayoshi, and P. Ling, Journal of Applied Physics, 71, 3225 (1992).
28. Fluorine Ion Induced Enhancement of Oxide Removal Prior to Silicon Epitaxial Growth. J. C. Lou, W. G. Oldham, H. Kawayoshi, and P. Ling, Apply. Phys. Lett., 60 (10), 1232 (1992).
29. The Selective Epitaxy of Silicon at Low-Temperatures.J. C. Lou, W. G. Oldham, H. kawayoshi, and P. Ling, Proceeding of Materials Research Society Symp., PP. 353-360, Vol. 220, 1991.
30. SOI Interface Structures in Selective Epitaxial Growth. Z. S. Weng, R. Gronsky, J. C. Lou, and W. G. Oldham, Proceeding of Materials Research Society Symp., PP. 707-712, Vol. 238, 1992.
31. Electrical Properties of High-Temperature Annealed Boron-Implanted Hg0.7Cd0.3Te. K. Y. Lam, J. Gong, T. B. Wu, and J. C. Lou, Japanese Journal of Applied Physics, 31, PP. 1870-1871(1992).
32. The Study of Seam Live Defects in Silicon-on-Oxide by Merged Epitaxial Lateral Overgrowth.J. C. Lou, and W. G. Oldham, Proceeding of Materials Research Society Symp., PP. 257-262, Vol. 317, 1994.
33. Seam Live Defects in Silicon-on-Insulator by Merged Epitaxial Lateral Overgrowth. Y. C. Shih, J. C. Lou, and W. G. Oldham, Appl. Phys. Lett., 65(13), 1638(1994).
34. Gate Oxynitride Grown in N2O and Annealed in NO Using Rapid Thermal Proceeding, S. C. Sun, C. H. Chen,,J. C. Lou, L. W. Yen and C. J. Lin, Proceeding of Materials Research Society Symp., PP. 241-246, Vol.387 1995.
35. A Novel Crystallization Method for Fabrication High-Performance Poly-Si Thin Film Transistors, T. F. Chen, C. F. Yeh, C. Y. Liu, and J. C. Lou, Electron Devices and Materials Symposium(EDMS 1999), Symposium OPO1.
36. The Investigation of Gate Oxide Integrity for Nitrided Oxides with Nitrogen Implantation and NO/N2 Anneal, J.M. Yao, Y.Y. Chen S.Y. Hsu, J.C. Lou and Y. L. Hwang, The Semicon Taiwan 1999.
37. Anti-Reflection Strategies for Sub-0.18um Dual Damascence Structure Patterning in KrF 248 nm Lithography, S. Y. Chou, C. M. Wang, C. C. Hsia, L. J. Chen, G. W. Hwang, S. D. Lee, andJ. C. Lou, Proc. SPIE, Vol. 3679, PP.923-931(1999).
38. A Study of Si Surface Micro-roughness in Modified SC-1 Process, J. C. Lou, W. P. Chou, W. J. Lu, C. M. Sheu, and H. C. Lai, Proceeding of International Conference on Wafer Rinse, Water Reclamation and Environmental Technology for Semiconductor Manufacturing. PP. 195-208, 2000
39. Focus Latitude Enhancement of Symmetrical Phase Mask Design for Deep Submicron Contact Hole Patterning, S. Y. Chou,J. C. Lou, L. J. Chen, L. H. Shiu, R. G. Liu, C. M. Wang, and T. S. Gau, J. Vac. Sci. & Technol. B. 19, PP. 2195-2205 (2001).
40. Evaluating the Impact of Spherical Aberration on Sub-0.2-Micron Contact/Via Hole Patterning, S.Y Chou, J. C. Lou, C. M. Lai, F. J. Liang, and L. J. Chen, 2001, Proceeding of SPIE 4346, PP. 1318-1327.
41. Customized Illumination Aperture Filter Design for Through-Pitch Focus Latitude Enhancement of Deep Submicron Contact Hole Printing, S. Y. Chou , J. C. Lou, F. J. Liang, T. S Gau, R. G. Liu, C. K. Chen, and C. M. Lai, J. Microlithography, Microfabrication, Microsystems., Vol. 1, 296 (2002); DOI:10.1117/1.1502261
42. High Quality Al2O3 IPD With NH3 Surface Nitridation, Y. Y. Chen, C. H. Chien, and J. C. Lou, IEEE Electron Device Lett., Vol. 24(8), 2003, PP. 503-505.
43. Investigation of Grain Boundary Control in the Drain Junction on Laser-Crystallized Poly-Si Thin Film Transistors, T. F. Chen, C. F. Yeh, and J. C. Lou, IEEE Electron Device Lett., Vol. 24(7), 2003, PP. 457-459.
44. Effects of Grain Boundary in the Drain Depletion on Excimer Laser-Annealed Poly-Si TFTs before and after NH3 Plasma Treatments, C. F. Yeh, T. F. Chen, and J. C. Lou, in AMLCD Tech. Dig., 2003, PP.173-176.
45. Process Improvement and Reliability Characteristics of Spin-on Poly-3-Hexylyhiophene Thin-Film Transistor, S. C. Wang, J. C. Lou, B. L. Liou, R. X. Lin, and C. F. Yeh, Electron Devices and Materials Symposium(EDMS 2004), Symposium SOI-2.
46. Effects of Grain Boundaries on Performance and Hot-Carrier Reliability of Excimer Laser Annealed Polycrystalline Silicon Thin Film Transistors (TFTs),T. F. Chen, C. F. Yeh, C. Y. Lin, and J. C. Lou, J. Appl. Phys., Vol. 95(10) PP.5778-5794 (2004)
47. Impact of Air Filter Material on Metal Oxide Semiconductor (MOS) Device Characteristics in HF Vapor Environment, C. W. Hsiao, J. C. Lou, C. F. Yeh, C. M. Hsieh, S. J. Lin and T. KuSumi, Jpn. J. Appl. Phys., Vol. 43(5B), PP. L659-L661 (2004)
48. Fabrication of Thin-Film Transistors on Plastic Substrates by Spin Etching and Device Transfer Process, S. C. Wang, C. T. Hsu, C. F. Yeh and J. C. Lou, Proceeding of SPIE Vol. 5276, PP.376-383 (2004)
49. A Novel Four-Mask-Processed Poly-Si TFT Fabricated Using Excimer Laser Crystallization of An Edge-Thickened a-Si Active Island, T. F. Chen, C. F. Yeh, C. Y. Liu, J. C. Lou, IEEE Electron Device Lett., Vol. 25(6), 2004, PP. 396-398
50. Process Improvement and Reliability Characteristics of Spin-On Poly-3-hexylthiophene Thin-Film Transistor, S. C. Wang, J.C. Lou, B.L. Liou, R.X. Lin and C.F. Yeh, J. Electrochem. Soc. Vol. 152(1), PP. G50-G56 (2005)
51. Fabricating Thin-Film Transistors on Plastic Substrates Using Spin Etching and Device Transfer, S. C. Wang, C. T. Hsu, C. F Yeh and J. C. Lou, J. Electrochem. Soc. 152(3), G227-G233 (2005)
52. Mobility Enhancement of Polycrystalline-Si Thin-Film Transistors Using Nanowire Channels by Pattern-Dependent Metal-Induced Lateral Crystallization, Y. C. Wu, T. C. Chang, P. T. Liu ,C. W. Chou, C. H. Tu, J. C. Lou and C. Y. Chang, Appl. Phys. Lett. 87, 143504 (2005).
53. Effect of Channel Width and NH3 Plasma Passivation on Electric Characteristics of Polysilicon Thin-Film Transistor by Pattern Development Metal-Induced Lateral Crystallization, Y. C. Wu, T. C. Chang, C. W. Chou, P.T. Liu, C. H. Tu, J. C. Lou, and C. Y. Chang, J. Electrochem. Soc., Vol. 152(7), G545-G549, (2005)
54. Characteristics of the Inter-Poly Al2O3 Dielectrics on NH3 Nitrided Bottom Poly-Si for Next-Generation Flash Memories, Y. Y. Chen, C. H. Chien and J. C. Lou, Jpn. J. Appl. Phys. Part 1, Vol.44, No. 4, PP. 1704-1710 (2005)
55. An Interfacial Investigation of High dielectric Constant Material Hafnium Oxide on Silicon Substrate, S. C. Chen, J. C. Lou, C. H. Chien, P. T. Liu, T. C. Chang, Thin Solid Film 488(1-2) PP.167-172, 2005
56. Damage Effect of Fluorine Implantation on PECVD a-SiOC Barrier Dielectric, F. M. Yang, T. C. Chang, P. T. Liu, C. W. Chen, Y. H. Tai, J. C. Lou, Nuclear Instruments and Methods in Physics, Research Section B--Beam Interactions with Materials and Atoms. Vol., 237(1-2), PP. 301-306, 2005
57. Nickel Nanocrystals with HfO2 Blocking Oxide for Nonvolatile Memory Application, F. M. Yang, T. C. Chang, P. T. Liu, U. S. Chen, P. H. Yeh, Y. C. Yu, J. Y. Lin, S. M. Sze, and J. C. Lou, Appl. Phys. Lett. 90, 222104 (2007)
58. Using Double Layer CoSi2 Nanocrystals to Improve the Memory Effects of Nonvolatile Memory Devices, F. M. Yang, T. C. Chang, P. T. Liu, P. H. Yeh, U. S. Chen, Y. C. Yu, J. Y. Lin, S. M. Sze, and J. C. Lou, Appl. Phys. Lett. 90, 212108 (2007)
59. Anomalous Negative Bias Temperature Instability Behavior in p-Channel Metal–Oxide -Semiconductor Field-Effect Transistors with HfSiON/SiO2 Gate Stack, S. C. Chen, C. H. Chien, J. C. Lou, Appl. Phys. Lett. 90, 233505 (2007)
60. Memory Characteristics of Co Nanocrystal Memory Device with HfO2 as Blocking Oxide, F. M. Yang, T. C. Chang, P. T. Liu, P. H. Yeh, Y. C. Yu, J. Y. Lin, S. M. Sze, and J. C. Lou, Appl. Phys. Lett. 90, 132102 (2007)
61. Nickel Silicide Nanocrystals Embedded in SiO2 and HfO2 for Nonvolatile Memory Application, F. M. Yang, T. C. Chang, P. T. Liu , P. H Yeh , Y. C. Yu , J. Y. Lin , S. M. Sze and J.C. Lou, Thin Solid Films, Vol. 516, Issues 2-4, 3 December 2007, PP. 360-363
62. Improvements of Ozone Surface Treatment on the Electrical Characteristics and Reliability in HfO2 Gate Stacks, S. Y. Chen, Y. Y. Chen, Y. T. Chang, J. C. Lou, K. T. Kin and C. H. Chien, Microelectronic Engineering, Vol. 84, Issues 9-10, September-October 2007, PP. 1898-1901
63. Nonvolatile Memory Characteristics of Nickel-Silicon-Nitride Nanocrystal, W. R. Chen, T. C. Chang, P. T. Liu, J. L. Yeh, C. H. Tu, J. C. Lou, C. F. Yeh, and C. Y. Chang, Appl. Phys. Lett. 91, 082103 (2007)
64. Novel Oxynitride Layer Applied to Flash Memory using HfO2 as Charge Trapping Layer, C.R. Hsieh, C.H. Lai, B.C. Lin, J.C. Lou, J.K. Lin, Y.L. Lai and H.L. Lai, Electron Device Solid-State Circuit (EDSSC 2007), PP. 629-632.
65. Electrical Characteristics of the High Work-Function Pt Nanocrystal Memory with Novel Tunnel Oxynitride, Y. Y. Chen, C. R. Hsieh, J. C. Lou, B. C. Lin and C. H. Lai, International Electron Device and Material Symposium(IEDMS 2007), Symposium PC-4
66. Effect of UV Illumination on Inverted-Staggered a-Si:H Thin Film Transistors, Y. Li, J. C. Lou, C. L. Chen, C. H. Hwang, and S. T. Yan, Electron Device Solid-State Circuit (EDSSC 2007), PP. 225-228.
67. Reliability Improvement for the PMOSFETS with HfO2/SiON Gate Stack Using Channel Fluorine Implantation, Y. Y. Chen, C. R. Hsieh, Y. Z. Hsieh and J. C. Lou, International Electron Device and Material Symposium(IEDMS 2008), Symposium C-629
68. Study on Surface Fluorine Passivation Effect for Sub-5nm Inter-Poly High-K Dielectric, C. R. Hsieh, Y. Y. Chen, K. W. Lu and J. C. Lou, International Electron Device and Material Symposium(IEDMS 2008), Symposium C-631
69. Reliability Improvement for the nMOSFETS with HfO2/SiON Gate Stack Using Channel Fluorine Implantation, Y. Y. Chen, C. R. Hsieh, Y. Z. Hsieh and J. C. Lou, International Electron Device and Material Symposium(IEDMS 2008), Symposium C-630
70. Suppression of Leakage Current in a-Si:H Thin Film Transistors by UV Illumination , Y. Li, C.H. Hwang, C.L. Chen, S. Yan, J. C. Lou, O. Hung, and R. Hsieh, in AM-FPD Tech. Dig., 2008, PP. 189-193
71. UV Illumination Technique for Leakage Current Reduction in a-Si:H Thin-Film Transistors, Y. Li, C. H. Hwang, C. L. Chen, S. T. Yan, and J. C. Lou, IEEE Transactions on Electron Devices, Vol.55, No.11, Nov. 2008, PP.3314-3318.
72. Impact of Charge Trapping Effect on Negative Bias Temperature Instability in P-MOSFETs with HfO2/SiON Gate Stack, S. C. Chen, C. H. Chien, and J. C. Lou, J. Phys.: Conf. Ser. 100(2008) 042045
73. Trapping and De-Trapping Characteristics of Electrons and Holes under Dynamic NBTI Stress on HfO2 and HfSiON Gate Dielectrics, W. L. Lin, J. C. Lou, Y. L. Lee and T. S. Chao, to be published in 2009 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits.
74. Al2O3 Inter-Poly Dielectric Charateristics with Interface Fluorine Passivation。Y. Y Chen, C. R. Hsieh, K.W. Lu, andJ. C. Lou, International Electron Device and Material Symposium (IEDMS 2009) Symposium GC-05.
75. HfO2 Inter-Poly Dielectric Characteristics with Interface Fluorine Passivation. Y. Y Chen, C. R. Hsieh, K.W. Lu, andJ. C. Lou, Electron Device Solid-State Circuit (EDSSC 2009), PP.233-235
76. Reliability Improvement of HfO2/SiON Gate Stacked nMOSFET Using Fluorinated Silicate Glass Passivation Layer. C. R. Hsieh, Y. Y. Chen, J. F. Chung, and J. C. Lou, Electron Device Solid-State Circuit (EDSSC 2009), PP 240-242
77. Novel Tunneling Oxynitride Layer Applied to Floating Gate Flash Memory, C. R. Hsieh, C. H. Lai, B. C. Lin, J. C. Lou, J. J. Shieh, H. L. Lai, and Y. L. Lai, International Conference on Electronic Materials 2010 (IUMRS-ICEM 2010) PII-33，Seoul，Korea，Aug. 2010
78. Improved Performance and Reliability for Metal-Oxide-Semiconductor Field-Effect-transistor with Fluorinated Silicate Glass Passivation Layer, C. R. Hsieh, Y.Y. Chen,J. C. Lou, Appl. Phys. Lett. 96, Issue 2, 022905(2010)
79. Effect of Fluorinated Silicate Glass Passivation Layer on Electrical Characteristics and Dielectric Reliabilities for HfO2/SiON Gate Stacked nMOSFET. C. R. Hsieh, Y. Y. Chen and J. C. Lou, Microelectron. Eng., Vol.87, No. 11, PP. 2241-2246, Nov. 2010
80. Characteristics of the Fluorinated High-K Inter-Poly Dielectrics. C. R. Hsieh, Y. Y. Chen, K. W. Lu, G. Lin and J. C. Lou, IEEE Electron Device Lett., Vol. 31, No. 12, PP. 1446-1448, Dec. 2010
81. Improved Retention Characteristics in Polycrystalline Silicon-Oxide-Hafnium Oxide-Oxide-Silicon-Type Nonvolatile Memory with Robust Tunnel Oxynitride. C. R. Hsieh, C. H. Lai, B. C. Lin, Y. K. Zheng，J. C. Lou, and G. Lin, Jpn. J. Appl. Phys. (JJAP). Vol. 50, No.3, PP. 30503, Mar. 2011
82. Enhanced Data Retention Characteristics on SOHOS-Type Nonvolatile Flash Memory with CF4-Plasma-Induced Deep Electron Trap Level. C. R. Hsieh, Y. Y. Chen, K.W. Lu, G. Lin and J. C. Lou, Accepted to be Published on Trans. Electrochem. Soc., Vol.35, April 2011
83. Effect of Interfacial Fluorination on the electrical Properties of the Inter-Poly High-K Dielectrics. C. R. Hsieh, Y. Y. Chen, K. W. Lu, G. Lin and J. C. Lou, Microelectron. Eng., Vol. 88, No.6, PP. 945-949, June. 2011
發表的專利（Patent List）：
專利編號 | 公告/公開日 | 專利名稱 | ||
1 | I286799 | 2007/09/11 | 092127715 | 使用氣泡的基材表面處理方法及設備 METHOD AND APPARATUS FOR TREATING A SUBSTRATE SURFACE BY BUBBLING |
2 | I255510 | 2006/05/21 | 093139892 | 以臭氧水成長超薄氧化層的方法 METHOD OF FORMING ULTRA THIN OXIDE LAYER BY OZONATED WATER |
3 | I234235 | 2005/06/11 | 092114625 | 在玻璃基板上製作單晶矽薄膜電晶體之方法 |
4 | I231046 | 2005/04/11 | 093116682 | 低溫多晶矽薄膜電晶體主動層之雷射再結晶方法 |
5 | I221100 | 2004/09/21 | 091110033 | 節省清洗用水的製程方法及系統 |
6 | 594884 | 2004/06/21 | 092114624 | 低溫多晶矽薄膜電晶體主動層之雷射再結晶方法 |
7 | 559907 | 2003/11/01 | 091122076 | 製造超薄氮化矽層的設備與方法 |
8 | 557125 | 2003/10/01 | 092202903 | 散熱片 |
9 | 554432 | 2003/09/21 | 091118343 | 一種由溫度控制的半導體蝕刻方法 |
10 | 550652 | 2003/09/01 | 091119599 | 調整晶圓加工電漿反應中離子與非離子比例之裝置及其方法 |
11 | 544805 | 2003/08/01 | 091114232 | 高純度自由基製程系統 |
12 | 519509 | 2003/02/01 | 091119877 | 晶圓承載機械手臂 |
13 | 200836116 | 2008/09/01 | 096127003 | 小區管理系統提供多個不同小區共享與信息交流的方法及其網路平台 A COMMUNIITY MANAGEMENT SYSTEM OFFERS SEVERAL COMMUNITIES SHARING TRANSFERRING INFORMATION WAYS AND ITS NETWORK PLATFORM |
14 | 200625473 | 2006/07/16 | 093139892 | 以臭氧水成長超薄氧化層的方法 METHOD OF FORMING ULTRA THIN OXIDE LAYER BY OZONATED WATER |
15 | 200606278 | 2006/02/16 | 093123465 | 以液相沈積成長二氧化鉿薄膜之方法 PROCESS FOR GROWING FILM OF HAFNIUM DIOXIDE BY LIQUID PHASE DEPOSITION |
專利編號 | 公告/公開日 | 專利名稱 | ||
16 | 200541076 | 2005/12/16 | 093116682 | 低溫多晶矽薄膜電晶體主動層之雷射再結晶方法 |
17 | 200514157 | 2005/04/16 | 092127715 | 使用氣泡的基材表面處理方法及設備 METHOD AND APPARATUS FOR TREATING A SUBSTRATE SURFACE BY BUBBLING |
18 | 200426950 | 2004/12/01 | 092114624 | 低溫多晶矽薄膜電晶體主動層之雷射再結晶方法 |
19 | 200426994 | 2004/12/01 | 092114625 | 在玻璃基板上製作單晶矽薄膜電晶體之方法 |
