基本介紹
- 中文名：王興晟
- 畢業院校：格拉斯哥大學
- 學位/學歷：博士
- 職業：教師
- 專業方向：微納電子器件與系統、隨機漲落與可靠性，新型存儲與存算一體等
- 職務：碩士生導師、博士生導師
- 職稱：教授
- 任職院校：華中科技大學
個人經歷,教育經歷,工作經歷,研究方向,學術成果,代表性論文,專著章節,榮譽獎項,
個人經歷
教育經歷
2000.9 ~ 2004.7
2004.9 ~ 2006.9
清華大學 - 套用數學 - 理學碩士學位 - 研究生畢業
2006.10 ~ 2010.7
格拉斯哥大學 - 微電子學與固體電子學 - 哲學博士學位 - 研究生(博士)畢業 - 建於1451年，英國。世界著名大學，最高排名51。有著名校友詹姆斯瓦特、亞當斯密、開爾文等
工作經歷
2010.3-2016.5
格拉斯哥大學 - 工程學院 - 副研究員
2016.5-2018.2
新思科技 - TCAD - 高級套用工程師
2018.2-2022
華中科技大學 - 光學與電子信息學院 - 教授
美國電氣和電子工程師學會的資深會員，也是會議主題方案委員會的成員，是TED、EDL等機構的黃金評論員。
2022-至今
華中科技大學-積體電路學院-教授
獲得“華為-2022奧林帕斯先鋒獎”
研究方向
微納電子器件與系統
隨機漲落與可靠性，表征與建模
設計與工藝協同最佳化方法學
憶阻器、存算一體晶片、類腦計算與神經網路
學術成果
參與了幾個國家/財團項目，包括英國EPSRC項目、蘇格蘭融資委員會項目和歐盟FP7/埃尼亞克/奧里藏2020項目，總資金達數百萬英鎊。在EDL、TED、APL、IEDM、VLSI、SISPAD等發表了70多篇科學論文，並有兩個章節。
代表性論文
1.T. Al-Ameri, V. P. Georgiev, T. Sadi, Y. Wang, F. Adamu-Lema,X. Wang, S. M. Amoroso, E. Towie, A. R. Brown and A. Asenov, "Impact of Quantum Confinement on Transport and the Electrostatic Driven Performance of Silicon Nanowire Transistors at the Scaling Limit,"Solid-State Electronics, Vol. 129, pp. 73–80, Mar. 2017.
2.Y. Wang, B. Cheng,X. Wang, E. Towie, C. Riddet, A. R. Brown, S. M. Amoroso, L. Wang, D. Reid, X. Liu, J. Kang and A. Asenov, "Variability-aware TCAD Based Design-Technology Co-Optimization Platform for 7nm Node Nanowire and Beyond," inProc. Symposium on VLSI Technology Digest of Technical Papers (VLSI-Tech), Honolulu HI USA, June 13-16, 2016, pp. 174–175.
3.A. Asenov, Y. Wang, B. Cheng,X. Wang, P. Asenov, T. Al-Ameri and V. Georgiev, “Nanowire transistor solutions for 5nm and beyond,” in Proc 17thInternational Symposium on Quality Electronic Design (ISQED), Santa Clara, USA, March 15-16, 2016, pp.269-274. (邀請論文，執筆)
4.Z. Zhang, Z. Zhang, R. Wang*, X. Jiang, S. Guo, Y. Wang,X. Wang*, B. Cheng, A. Aseov and R. Huang, "New Approach for Understanding “Random Device Physics” from Channel Percolation Perspectives: Statistical Simulations, Key Factors and Experimental Results," inProc. IEEE International Electron Devices Meeting (IEDM), San Francisco, CA, USA, Dec. 5-7, 2016, pp. 172–175.
5.X. Jiang, S. Guo, R. Wang*,X. Wang*, B. Cheng, A. Asenov, and R. Huang, “A device-level characterization approach to quantify the impacts of different random variation sources in FinFET technology,”IEEE Electron Device Letters,Vol.37 no.8, pp.932-935, August 2016.
6.X. Jiang, S. Guo, R. Wang, Y. Wang,X. Wang, B. Cheng, A. Asenov and R. Huang, "New Insights into the Near-Threshold Design in Nanoscale FinFET Technology for Sub-0.2V Applications," inProc. International Electron Devices Meeting (IEDM), San Francisco, CA, USA, Dec. 5-9, 2016, pp. 695–698.
7.X. Wang, B. Cheng, D. Reid, A. Pender, P. Asenov, C. Millar, and A. Asenov, “FinFET centric variability-aware compact model extraction and generation technology supporting DTCO,”IEEE Transactions on Electron Devices,vol.62 no.10, pp.3139-3146, Oct. 2015.
8.Y. Wang, T. Al-Ameri,X. Wang*, V. Georgiev, E. Towie, S. M. Amoroso, A.R. Brown, B. Cheng, D. Reid, C. Riddet, L. Shifren, S. Sinha, G. Yeric, R. Aitken, X. Liu, J. Kang, and A. Asenov*, “Simulation study of the impact of quantum confinement on the electrostatically driven performance of nanowire transistors,”IEEE Transactions on Electron Devices, vol.62 no.10, pp.3299-3236, Oct. 2015.
9.X. Jiang,X. Wang*, R. Wang*, B. Cheng, A. Asenov and R. Huang*, "Predictive Compact Modeling of Random Variations in FinFET Technology for 16/14nm Node and Beyond," inProc. IEEE International Electron Devices Meeting (IEDM), Washington DC, Dec. 7-9, 2015, p. 28.3.1–28.3.4.
10.X. Jiang, J. Wang,X. Wang*, R. Wang*, B. Cheng, A. Asenov, L. Wei*, and R. Huang, “New Assessment Methodology Based on Energy–Delay–Yield Cooptimization for Nanoscale CMOS Technology,”IEEE Transactions on Electron Devices, Vol. 62 No. 6, pp.1746-1753, June 2015.
11.A. Asenov, B. Cheng,X. Wang, A. R. Brown, C. Millar, C. Alexander, S. M. Amoroso, J. B. Kuang and S. Nassif, "Variability Aware Simulation Based Design-Technology Co-optimization (DTCO) Flow in 14 nm FinFET/SRAM Cooptimization,"IEEE Transactions on Electron Devices, Vol. 62, No. 6, pp. 1682–1690, June 2015. (邀請論文，封面論文)
12.S. M. Amoroso, V. P. Georgiev, L. Gerrer, E. Towie,X. Wang, C. Riddet, A. R. Brown and A. Asenov, "Inverse Scaling Trends for Charge-Trapping-Induced Degradation of FinFETs Performance,"IEEE Transactions on Electron Devices, Vol. 61, No. 12, pp. 4014–4018, Oct. 2014.
13.F. Adamu-Lema#,X. Wang#, S. M. Amoroso, C. Riddet, B. Cheng, L. Shifren, R. Aitken, S. Sinha, G. Yeric, A. Asenov, “Performance and variability of doped multi-threshold FinFETs for 10nm CMOS,”IEEE Transactions on Electron Devices, vol.61 no.10, pp.3372-3378, Oct. 2014.
14.X. Wang, A.R. Brown, B. Cheng, S. Roy, and A. Asenov, “Drain Bias Effects on Statistical Variability and Reliability and Related Subthreshold Variability in 20-nm Bulk Planar MOSFETs,”Solid-State Electronics. Vol.98, pp.99-105, August 2014.
15.A. Asenov, F. Adamu-Lema,X. Wangand S. M. Amoroso, "Problems with the continuous doping TCAD simulations of decananometer CMOS transistors,"IEEE Transactions on Electron Devices, Vol. 61, No. 8, pp. 2745–2751, Aug. 2014.
16.A. Asenov, B. Cheng,X. Wang, A. R. Brown, D. Reid, C. Millar and C. L. Alexander, "Simulation Based Transistor-SRAM Co-Design in the Presence of Statistical Variability and Reliability," inProc. IEEE International Electron Devices Meeting (IEDM), Washington DC, Dec. 9-11, 2013, pp. 818–821. (邀請論文)
17.X. Wang, B. Cheng, A.R. Brown, C. Millar, J.B. Kuang, S. Nassif, A. Asenov, “Statistical Variability and Reliability and the Impact on Corresponding 6T-SRAM Cell Design for a 14-nm node SOI FinFET Technology,”IEEE Design & Test,vol.30 no.6, pp.18-28, December 2013. (邀請論文)
18.X. Wang, B. Cheng, A. R. Brown, C. Millar, J. B. Kuang, S. Nassif, and A. Asenov, “Interplay Between Process-Induced and Statistical Variability in 14-nm CMOS technology Double-Gate SOI FinFETs,”IEEE Transactions on Electron Devices, Vol.60 No.8, pp.2485-2492, August 2013.
19.X. Wang, F. Adamu-Lema, B. Cheng, and A. Asenov, “Geometry, Temperature and Body Bias Dependence of Statistical Variability of 22-nm Bulk CMOS Technology: A Comprehensive Simulation Analysis,”IEEE Transactions on Electron Devices, Vol.60 No.5, pp.1547-1554, May 2013.
20.X. Wang, G. Roy, O. Saxod, A. Bajolet, A. Juge, and A. Asenov, “Simulation Study of Dominant Statistical Variability Sources in 32-nm High-k/Metal Gate CMOS,”IEEE Electron Device Letters, Vol.33, No.5, pp.643-645, May 2012.
21.K. Abid,X. Wang, A. Z. Khokhar, S. Watson, S. Al-Hasani and F. Rahman, "Electrically tuneable spectral responsivity in gated silicon photodiodes,"Applied Physics Letters, Vol. 99, No. 23, p. 231104, Dec. 2011.
22.B. Benbakhti, K. Chan, E. Towie, K. Kalna, C. Riddet,X. Wang, G. Eneman, G. Hellings, K. De Meyer, M. Meuris and A. Asenov, "Numerical analysis of the new Implant-Free Quantum-Well CMOS: DualLogic approach,"Solid-State Electronics, Vol. 63, No. 1, pp. 14–18, Sept. 2011.
23.S. Markov,X. Wang, N. Moezi and A. Asenov, "Drain Current Collapse in Nanoscaled Bulk MOSFETs Due to Random Dopant Compensation in the Source/Drain Extensions,"IEEE Transactions on Electron Devices, Vol. 58, No. 8, pp. 2385–2393, Aug. 2011.
24.X. Wang, S. Roy, A. R. Brown and A. Asenov, "Impact of STI on Statistical Variability and Reliability of Decananometer MOSFETs,"IEEE Electron Device Letters, Vol. 32, No. 4, pp. 479–481, Apr. 2011.
25.X. Wang, A. R. Brown, N. M. Idris, S. Markov, G. Roy and A. Asenov, "Statistical Threshold-Voltage Variability in Scaled Decananometer Bulk HKMG MOSFETs: A Full-Scale 3-D Simulation Scaling Study,"IEEE Transactions on Electron Devices, Vol. 58, No. 8, pp. 2293–2301, Aug. 2011. (封面論文)
26.X. Wang, A. R. Brown, B. Cheng and A. Asenov, "Statistical Variability and Reliability in Nanoscale FinFETs," inProc.IEEE International Electron Devices Meeting (IEDM), Washington DC, Dec. 5-7, 2011, pp. 103–106.
27.B. Bindu, B. Cheng, G. Roy,X. Wang, S. Roy and A. Asenov, "Parameter set and data sampling strategy for accurate yet efficient statistical MOSFET compact model extraction,"Solid-State Electronics, Vol. 54, No. 3, pp. 307–315, Mar. 2010.
28.B. Cheng, D. Dideban, N. Moezi, C. Millar, G. Roy,X. Wang, S. Roy and A. Asenov, "Statistical Variability Compact Modeling Strategies for BSIM4 and PSP,"IEEE Design and Test of Computers, Vol. 27, No. 2, pp. 26–35, Mar./Apr. 2010.
29.A. Asenov, S. Roy, A. R. Brown, G. Roy, C. L. Alexander, C. Riddet, C. Millar, B. Cheng, A. Martinez, N. Seoane, D. Reid, M. Faiz. Bukhori,X. Wangand U. Kovac, "Advanced simulation of statistical variability and reliability in nano CMOS transistors," inProc.IEEE International Electron Devices Meeting (IEDM), USA, Dec. 2008, p. 421.（邀請論文）
專著章節
1.X. Wang*, V. P. Georgiev, F. Adamu-Lema, L. Gerrer, S. M. Amoroso, and A. Asenov, "Chapter 6 TCAD-based design technology co-optimization for variability in nanoscale SOI FinFETs," inIntegrated Nanodevice and Nanosystem Fabrication: Materials, Techniques, and New Opportunities, 1st ed., S. Deleonibus, Ed. Pan Stanford Publishing, 2017, pp.215-252.
2.A. Asenov, B. Cheng, A. R. Brown andX. Wang, "Chapter 15 Impact of Statistical Variability on FinFET Technology: From Device, Statistical Compact Modelling to Statistical Circuit Simulation," inNyquist AD Converters, Sensor Interfaces, and Robustness, A. H. M. van Roermund, A. Baschirotto and M. Steyaert, Eds. New York: Springer, 2013, pp. 281–291.
榮譽獎項
2017 IEEE高級會員
2007 英國ORS獎勵
