卓成

卓成

卓成，男，浙江大學“百人計畫”A類研究員，教授，博導，2016年美國聖母大學訪問教授，2017年日本大阪大學客座教授，IEEE高級會員。

基本介紹

  • 中文名：卓成
  • 畢業院校：美國密西根大學
  • 學位/學歷：博士
  • 職業：教師
  • 專業方向：低功耗晶片設計、人工智慧算法及硬體加速、3D晶片設計及最佳化
  • 職務：浙江大學博士生導師
  • 任職院校：浙江大學信息與電子工程學院
  • 職稱：教授
  • 性別：男
個人經歷,主講課程,研究方向,學術成果,榮譽獎項,

個人經歷

浙江大學“百人計畫”A類研究員，教授，博導，2016年美國聖母大學訪問教授，2017年日本大阪大學客座教授，IEEE高級會員。於浙江大學竺可楨學院獲學士學位，電子科學與技術專業獲碩士學位，美國密西根大學-安娜堡計算機科學與工程專業獲得博士學位，在美國英特爾公司工作多年，主要研究領域為積體電路設計和設計自動化，包括3D晶片，深度學習算法及硬體加速，低功耗設計，電源及信號完整性等，具有多年研究和工業界相關經驗。
受邀現任IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems編委，IEEE VLSI Circuits and Systems Letter編委，Elsevier Integration, the VLSI Journal編委，IETCyber Physical System: Theory & Application客座編委，現任或曾任多個業內知名會議的技術委員會成員，及組織委員會成員。

主講課程

數字系統設計 2018春

研究方向

低功耗晶片設計　人工智慧算法及硬體加速　3D晶片設計及最佳化　電源及信號完整性

學術成果

2018/11/05 參加ICCAD並主持SRC@ICCAD‘18
2018/11 DATE，AAAI論文錄用
2018/10 TCAD論文錄用
2018/06/25 陳佰鑫論文被ICCAD 2018錄用
迄今共發表60餘篇業內國際知名期刊和會議論文，及一本英文專著章節，包括IEEE TVLSI， IEEE TCAD，IEEE Design & Test，DAC，ICCAD等。
期刊論文
  • J32 Jianing Deng, Zhiguo Shi, andCheng Zhuo,“Energy Efficient Real-Time UAV Object Detection on Embedded Platforms,”to appear in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).
  • J31 Di Gao, Dayane Reis, Xiaobo Sharon Hu, andCheng Zhuo,“Eva-CiM: A System-Level Energy Evaluation Framework for Computing-in-Memory Architectures,”to appear in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).
  • J30ChengZhuo, Shaoheng Luo, Houle Gan, Jiang Hu, and Zhiguo Shi,“Noise-Aware DVFS for Efficient Transitions on Battery-Powered IoT Devices,” to appear inIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2019.
  • J29 Umamaheswara Tida,ChengZhuo, Leibo Liu, and Yiyu Shi,“Dynamic Frequency Scaling Aware Opportunistic Through-Silicon-Via Inductor Utilization in Resonant Clocking,”to appear in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2019.
  • J28 Shunjie Dong, Weiqing Ji, Hailong Yao, andCheng Zhuo,“Early-stage microfluidic network design framework using graph sparsificiation based optimisation,”Electronics Letters, Vol. 55, Issue 19, pp. 1034-1037, 2019.
  • J27 Jun Chen, Hajime Kando, Toshiki Kanamoto,Cheng Zhuo, and Masanori Hashimoto,“A Multi-Core Chip Load Model for PDN Analysis Considering Voltage-Current-Timing Interdependency and Operation Mode Transitions,”IEEE Transactions on Components, Packaging, and Manufacturing Technology, Vol. 9, Issue 9, pp. 1669-1679, 2019.
  • J26 Umamaheswara Tida,ChengZhuo, and Yiyu Shi,“Single-Inductor-Multiple-Tier-Regulation: TSV-Inductor Based On-Chip Buck Converters for 3D-IC Power Delivery,”IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Vol. 27, Issue10, pp. 2305-2316, 2019.
  • J2 Yaguang Li,ChengZhuo, and Pingqiang Zhou,“A Cross-Layer Framework of Temporal Power and Supply Noise Prediction,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 38, Issue 10, pp. 1914-1927, 2019.
  • J24ChengZhuo, Kassan Unda, Yiyu Shi, and Wei-Kai Shih,“From Layout to System: Early Stage Power Delivery and Architecture Co-Exploration,”IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 38, Issue 7, pp. 1291-1304, 2019.
  • J23 Dawei Li, Xiaowei Xu, Weibo Liu, Li Zhang,Cheng Zhuo, and Yiyu Shi,“Optimal Design of a Low-Power, Phase-Switching Modulator for Implantable Medical Applications,”ELSEVIER Integration, the VLSI Journal, Vol. 69, pp. 289-300, 2019.
  • J22 Leilei Wang,ChengZhuo, and Pingqiang Zhou,“Run-time Demand Estimation and Modulation of On-Chip Decaps at System Level for Leakage Power Reduction in Multicore Chips,' ELSEVIER Integration, the VLSI Journal, Vol. 65, pp. 322-330, 2019.
  • J21ChengZhuoand Baixin Chen,“System-Level Design Consideration and Optimization of Through-Silicon-Via Inductor,”ELSEVIER Integration, the VLSI Journal, Vol. 65, pp. 362-369, 2019.
  • J20 Baixin,ChengZhuo,and Yiyu Shi,“A Physics-Aware Methodology for Equivalent Circuit Model Extraction of TSV-Inductor,”ELSEVIER Integration, the VLSI Journal, Vol. 63, pp. 160-166, 2018.
  • J19 Zhongyang Liu, Shaoheng Luo, Xiaowei Xu, Yiyu Shi, andChengZhuo,“A Multi-Level Optimization Framework for FPGA-Based Cellular Neural Network Implementation,”ACM Journal on Emerging Technologies in Computing Systems (JETCS), Vol. 14, Issue 4, pp. 47:1-47:17, Dec. 2018.
  • J18 Xiaowei Xu, Qing Lu, Tianchen Wang, Yu Hu,Cheng Zhuo, Jinglan Liu, Yiyu Shi,“Efficient Hardware Implementation of Cellular Neural Networks with Incremental Quantization and Early Exit,”ACM Journal on Emerging Technologies in Computing Systems (JETCS), Vol. 14, Issue 4, pp. 48:1-48:20, Dec. 2018.
  • J17 Wenjian Yu, Zhezhao Xu, Bo Li, andCheng Zhuo,“Floating Random Walk Based Capacitance Simulation Considering General Floating Metals,' IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 37, Issue 8, pp. 1711-1715, Aug. 2018.
  • J16 Zhongyang Liu,ChengZhuo, and Xiaowei Xu,“An Efficient Segmentation Method Using Quantized and Non-linear CeNN for Breast Tumor Classification,”IET Electronic Letters (EL), Vol. 54, Issue 12, pp. 737-738, Jun. 2018.
  • J15 Yong-Sheng Li, Qiu Min, Yan Li, En-Xiao Liu, Ran Hao, Hong-Sheng Chen,ChengZhuo, Wen-Yan Yin, Zhe-Yao Wang, Hui-Chun Yu, and Er-Ping Li,“Electromagnetic Characteristics of Multi-Port TSVs Using L-2L De-embedding Method and Shielding TSVs,”IEEE Transactions on Electromagnetic Compatibility (TEMC), Vol. 51, Issue 5, pp. 1541-1548, 2017.
  • J14 Po-Yi Wu, Wai-Kei Mak, Ting-Chi Wang,ChengZhuo, Kassan Unda, and Yiyu Shi,“A Routing Framework for Technology Migration with Bump Encroachment,”ELSEVIER Integration, the VLSI Journal, Vol. 58, pp. 1-8, Jun. 2017.
  • J13ChengZhuo, HouleGan, Wei-Kai Shih, andAlaeddinAydiner, “A Cross-Layer Approach for Early-Stage Power Grid Design and Optimization,” ACM Journal on Emerging Technologies in Computing Systems (JETCS), Vol. 12, Issue 3, pp. 25:1-25:20, Sept. 2015.
  • J12ChengZhuo, Gustavo Wilke,RitochitChakraborty,AlaeddinAydiner,SouravChakravarty, and Wei-kai Shih, “Silicon Validated Power Delivery Modeling and Analysis on a 32nm DDR I/O Interface,” IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Vol. 23, Issue 9, pp. 1760-1771, Sept. 2015.
  • J11UmamaheswaraTida,RongboYang,ChengZhuo, andYiyuShi, “On the Efficacy of Through-Silicon-Via Inductors,” IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Vol. 23, Issue 7, pp. 1322-1334, Jul. 2015.
  • J10UmamaheswaraTida,ChengZhuo,RongboYang, andYiyuShi, “NovelThroughSilicon-Via Inductor Based On-chip DC-DC Converter Designs in 3D ICs,” ACM Journal on Emerging Technologies in Computing Systems (JETCS), Vol. 11 Issue 2, pp. 16:1- 16:14, Nov. 2014.
  • J9ChengZhuo, DavidBlaauw, and Dennis Sylvester, “A Statistical Framework forPostFabricationOxide Breakdown Reliability Prediction and Management,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 32, No. 4, pp. 630-643, Apr. 2013.
  • J8ChengZhuo,KavirajChopra, DavidBlaauw, and Dennis Sylvester, “Process Variation and Temperature-Aware Full Chip Oxide Breakdown Reliability Analysis,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 30, No. 9, pp. 1321-1334, Sept. 2011.
  • J7 Prashant Singh,ChengZhuo, Eric Karl, DavidBlaauw, and Dennis Sylvester, “SensorDrivenReliability andWearoutManagement,” IEEE Design & Test of Computers, Vol. 26, No. 6, pp. 40-49, Nov./Dec. 2009.
  • J6HuafengZhang,ChengZhuo,JinfangZhou, andKangshengChen, “Modeling and Optimization of Rotary Traveling Wave Oscillator,” Journal of Zhejiang University (Engineering Science), Vol. 43, No. 4, pp. 634-640, Apr. 2009.
  • J5JunjunGu,ChengZhuo,JianghuaQian,JinfangZhou, andKangshengChen, “Transient Analysis of Irregular Power Grid by Row-Based Iterative Method,” Journal of Zhejiang University (Engineering Science), Vol. 43, No. 1, pp. 92-98, Jan. 2009.
  • J4YinjunWang,ChengZhuo,JunyongDeng,JinfangZhou, andKangshengChen, “InPackageP/G Planes Analysis and Optimization Based on Transmission Matrix Method,” Journal of Zhejiang University Science A, Vol. 9, No. 6, pp. 849-857, Jun. 2008.
  • J3JunyongDeng,JianghuaQian,ChengZhuo,JinfangZhou, andKangshengChen, “Random-Walk-Based Power Pads Assignment Algorithm,” Journal of Zhejiang University (Engineering Science), Vol. 42, No. 6, pp. 943-948, Jun. 2008.
  • J2ChengZhuo, Jiang Hu, Min Zhao, andKangshengChen, “Power Grid Analysis and Optimization Using Algebraic Multigrid,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 27, No. 4, pp. 738-751, Apr. 2008.
  • J1JunyongDeng,JianghuaQian,ChengZhuo,JinfangZhou, andKangshengChen, “Improvement of Random Walk Algorithm for Power/Ground Grid Analysis,” Journal of Zhejiang University (Engineering Science), Vol. 41, No. 8, pp. 1324-1328, Aug. 2007.會議論文
  • C47 Chuliang Guo, Li Zhang, Xian Zhou, Weikang Qian, andCheng Zhuo,“A Reconfigurable Approximate Multiplier for Quantized CNN Applications,”to appear in Proc. IEEE/ACM Asia and South Pacfic Design Automation Conference (ASPDAC), 2020.
  • C46 Mengyuan Li, Xunzhao Yin, Sharon Xiaobo Hu, andCheng Zhuo,“Nonvolatile and Energy-Efficient FeFET-Based Multiplier for Energy-Harvesting Devices,”to appear in Proc. IEEE/ACM Asia and South Pacfic Design Automation Conference (ASPDAC), 2020.
  • C45 Zheyu Yan, Yiyu Shi, Wang Liao, Masanori Hashimoto, Xichuan Zhou, andCheng Zhuo,“When Single Event Upset Meets Deep Neural Networks: Observations, Explorations, and Remedies,”to appear in Proc. IEEE/ACM Asia and South Pacfic Design Automation Conference (ASPDAC), 2020.
  • C44 Shenghao Liu, Baixin Chen, andCheng Zhuo,“Revisiting EAVP for Power Delivery Decoupling Optimization,”in Proc. IEEE International Workshop on the Electromagnetic Compatibility of Integrated Circuits (EMC Compo), pp. 129-131, 2019.
  • C43 Yufei Chen, Qinming Zhang, Tingtao Li, Hao Yu, Mei Tian, andCheng Zhuo,“ANT-UNet: Accurate and Noise-Tolerant Segmentation for Pathology Image Processing,”in Proc. IEEE Biomedical Circuits and Systems Conference (BioCAS), pp. 1-4, 2019.
  • C42 Tianhao Shen, Di Gao, Yiyu Shi, andCheng Zhuo,“Power Delivery Resonant Virus: Concept and Applications,”in Proc. IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), pp. 1-6, 2019.
  • C41 Xichuan Zhou, Lang Xu, Shujun Liu, Yingcheng Lin, Lei Zhang, andCheng Zhuo,“An Efficient Compressive Convolutional Network for Unified Object Detection and Image Compression,”in Proc. AAAI Conference on Artificial Intelligence, Vol. 33, pp. 5949-5956, 2019.
  • C40 Lu Wang, Leilei Wang, Dejia Shang,Cheng Zhuo, and Pingqiang Zhou,“Optimizing the Energy Efficiency of Power Supply in Heterogeneous Multicore Chips with Integrated Switched-Capacitor Converters,”in Proc. IEEE/ACM Design, Automation & Test in Europe Conference & Exhibition (DATE), pp. 836-841, 2019.
  • C39 Qiu Min, Shi-Yun Zhou,Cheng Zhuo, Jian-Ming Jin, and Er-Ping Li,“Electrical-thermal co-simulation for through silicon via and active tier in 3-D IC,”in Proc. IEEE International Symposium on Electromagnetic Compatibility and IEEE Asia-Pacific Symposium on Electromagnetic Compatibility (EMC/APEMC), pp. 110, 2018.
  • C38 Baixin Chen,UmamaheswaraTida,Cheng Zhuo, and Yiyu Shi,“Modeling and Optimization of Magnetic Core TSV-Inductor for On-Chip DC-DC Converter,”in Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 1-8, 2018.
  • C37 Shaoheng Luo,Cheng Zhuo, and Houle Gan,“Noise-Aware DVFS Transition Sequence Optimization for Battery-Powered IoT Devices,”in IEEE/ACM Design Automation Conference (DAC), pp. 1-6, 2018.
  • C36 Di Gao, Tianhao Shen, andCheng Zhuo,“A Design Framework for Processing-in-Memory Accelerator,”inProc. International Workshop on System Level Interconnect Prediction (SLIP), pp. 1-4, 2018.
  • C35 Di Gao andCheng Zhuo,“An Accelerator-Aware Microarchitecture Simulator for Design Space Exploration,”in Proc. IEEE China Semiconductor Technology International Conference (CSTIC), pp. 1-4, 2018.
  • C34 Zhongyang Liu andCheng Zhuo,“Cellular Neural Network (CeNN) FPGA Implementation Using Multi-Level Optimization,”in Proc. IEEE China Semiconductor Technology International Conference (CSTIC), pp. 1-3,Nominated for Best Student Paper Award of Symposium IX,2018.
  • C33Shaoheng Luo, Baixin Chen, Ke Li,Cheng Zhuo, and Yiyu Shi,“Novel LC Resonant Clocking for 3D IC Using TSV-Inductor and Capacitor,” in Proc. IEEEElectrical Design of Advanced Packaging and Systems Symposium (EDAPS), pp. 1-3, 2017.
  • C32 Qiu Min, Er-Ping Li,Cheng Zhuo, Yong-Sheng Li, Shi-Yun Zhou, and Jian-Ming Jin,“Electrical-Thermal Co-Analysis of Through Silicon Via with Equivalent Circuit Model,”in Proc. IEEEElectrical Design of Advanced Packaging and Systems Symposium (EDAPS), pp. 1-4, 2017.
  • C31Shi-Yun Zhou,Cheng Zhuo, Qiu Min, and Er-Ping Li,“Graphene Based Thermoelectric Energy Harvesting in 3D ICs,”in Proc. IEEEElectrical Design of Advanced Packaging and Systems Symposium (EDAPS), pp. 1-3, 2017.
  • C30Zhongyang Liu, Shaoheng Luo, Xiaowei Xu, Yiyu Shi, andCheng Zhuo,“FPGA Based Cellular Neural Network Optimization: from Design Space to System,”in Proc. ACMNeuromorphic Computing Symposium, pp. 1-6, 2017.
  • C29 Xiaowei Xu, Qing Lu, Tianchen Wang, Jinglan Liu,Cheng Zhuo, Sharon Hu, and Yiyu Shi,“Edge Segmentation: Empowering Mobile Telemedicine with Compressed Cellular Neural Networks,”in Proc. IEEE/ACM International Conference On Computer-Aided Design (ICCAD), pp. 880-887, 2017.
  • C28Cheng Zhuo, Bei Yu, and Di Gao,“Accelerating Chip Design with Machine Learning From Pre-Silicon to Post-Silicon,”in Proc. IEEE International System-on-Chip Conference (SOCC), pp. 227-232, 2017.
  • C27Cheng Zhuoand Baixin Chen,“TSV Inductor Optimization and Its Design Implication,”in Proc. IEEE China Semiconductor Technology International Conference (CSTIC), pp. 1-4, 2017.
  • C26 Kassan Unda, Chung-Han Chou, Shih-Chieh Chang,Cheng Zhuoand Yiyu Shi,“CN-SIM: A Cycle-Accurate Full System Power Delivery Noise Simulator,”in Proc. IEEE/ACM Asia and South Pacfic Design Automation Conference (ASPDAC), pp. 554-559, 2017.
  • C25Cheng Zhuo,“A Cross-Layer Framework for Early-Stage Full Chip Oxide Breakdown Reliability Analysis,”in Proc. IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), pp. 1-4, 2016.
  • C24 Alaeddin Aydiner,ChengZhuo, Wei-Kai Shih, Jason Kao, and Raymond Law, “Bursty Jitter in High Speed I/O Due to Power State Transition and Its Impact on Signal Integrity,” in Proc. IEEE International Symposium on Electromagnetic Compatibility(EMC), pp. 491-494, 2016.
  • C23ChengZhuo,KassanUnda, andYiyuShi, “A Novel Cross-Layer Framework forEarlyStagePower Delivery and Architecture Co-Exploration,” in Proc. IEEE/ACM Design Automation Conference (DAC),Nominated for Best Paper Award, pp. 1-6, 2016.
  • C22HantaoHuang,ChengZhuo,FengboRen, andHaoYu, “A Compressive-sensing based Testing Vehicle for 3D TSV Pre-bond and Post-bondTesting Data,” in Proc. ACM International Symposium on Physical Design (ISPD), pp. 19-25, 2016.
  • C21 Tao Wang,JinglanLiu,ChengZhuo, andYiyuShi, “1-Bit Compressed Sensing Based Framework for Built-in Resonance Frequency Prediction Using On-Chip Noise Sensors,” in Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 721-728, 2015.
  • C20UmamaheswaraTida, VarunMittapalli,ChengZhuo, andYiyuShi, “Opportunistic Through-Silicon-Via Inductor Utilization in Resonant Clock: Concept and Algorithm,” in Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 750-757, 2014.
  • C19XueqianZhao,ZhuoFeng, andChengZhuo, “An Efficient Spectral GraphSparsificationApproach to Scalable Reduction of Large Flip-Chip Power Grids,” in Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 218-223, 2014.
  • C18 SaiDinakarrao,ChenjieGu,ChengZhuo, andHaoYu, “AZonotopedMacromodelingfor Reachability Verification of Eye-diagram in High-speed I/O Links with Jitter,” in Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 696-701, 2014.
  • C17UmamaheswaraTida, VarunMittapalli,ChengZhuo, andYiyuShi, “Green On-chip Inductors in Three-Dimensional Integrated Circuits,” in Proc. IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 571-576, 2014.
  • C16ChengZhuo, HouleGan, and Wei-kai Shih, “Early-Stage Power Grid Design: Extraction, Modeling and Optimization,” in Proc. IEEE/ACM Design Automation Conference (DAC), pp. 1-6, 2014.
  • C15UmamaheswaraTida,ChengZhuo, andYiyuShi, “Through-Silicon-Via Inductor: Is It Real or Just AFantasy?,” in Proc. IEEE/ACM Asia and SouthPacficDesign Automation Conference (ASPDAC), pp. 837-842, 2014.
  • C14MuhammetMustafaOzdal,ChirayuAmin, AndreyAyupov, Steven Burns, Gustavo Wilke, andChengZhuo, “An Improved Benchmark Suite for the ISPD-2013 Discrete Cell Sizing Contest,” in Proc. ACM International Symposium on Physical Design (ISPD), pp. 168-170, 2013.
  • C13Cheng Zhuo, Gustavo Wilke, Ritochit Chakraborty, Alaeddin Aydiner, Sourav Chakravarty, and Wei-kai Shih, “A Silicon-Validated Methodology for Power Delivery Modeling and Simulation,” in Proc. IEEE/ACM International Conference onComputerAidedDesign (ICCAD), pp. 255-262, 2012.
  • C12MuhammetMustafaOzdal,ChirayuAmin, AndreyAyupov, Steven Burns, Gustavo Wilke, andChengZhuo, “The ISPD-2012 Discrete Cell Sizing Contest and Benchmark Suite,” in Proc. ACM International Symposium on Physical Design (ISPD), pp. 161-164, 2012.
  • C11JunjunGu, Gang Qu, Lin Yuan, andChengZhuo, “Improving DualVtTechnology by Simultaneous Gate Sizing and Mechanical Stress Optimization,” in Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 732-735, 2011.
  • C10ChengZhuo, Kanak Agarwal, Dennis Sylvester, and DavidBlaauw, “Active Learning Framework for Post-Silicon Variation Extraction and Test Cost Reduction,” in Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 508- 515, 2010.
  • C9ChengZhuo, Dennis Sylvester, and DavidBlaauw, “Process Variation andTemperatureAwareReliability Management,” in Proc. IEEE/ACM Design, Automation and Test in Europe (DATE), pp. 580-585, 2010.
  • C8ChengZhuo, Yung-Hsu Chang, Dennis Sylvester, and DavidBlaauw, “Design Time Body Bias Selection for Parametric Yield Improvement,” in Proc. IEEE/ACM Asia and South Pacific Design Automation Conference (ASPDAC), pp. 681-688, 2010.
  • C7ChengZhuo, DavidBlaauw, and Dennis Sylvester, “Post-FabricationMeasurementDrivenOxide Breakdown Reliability Prediction and Management,” in Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 441-448, 2009.
  • C6KavirajChopra,ChengZhuo, DavidBlaauw, and Dennis Sylvester, “A Statistical Approach for Full-Chip Gate-Oxide Reliability Analysis,” in Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 698-705, 2008.
  • C5ChengZhuo, DavidBlaauw, and Dennis Sylvester, “Variation-Aware Gate Sizing and Clustering for Post-Silicon Optimized Circuits,” in Proc. IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), pp. 105-110, 2008.
  • C4ChengZhuo,HuafengZhang,RupakSamanta, Jiang Hu, andKangshengChen, “Modeling, Optimization and Control of Rotary Traveling-Wave Oscillator,” in Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 476- 480, 2007.
  • C3ChengZhuo, Jiang Hu, Min Zhao andKangshengChen, “FastDecapAllocation Based on Algebraic Multigrid,” in Proc. IEEE/ACM International Conference onComputerAidedDesign (ICCAD), pp. 107-111, 2006.
  • C2ChengZhuo,HuafengZhang,JinfangZhou,ShichuanDu, Xin Wu,WenjieMao, andKangshengChen, “Early-Stage Power Grid Analysis Using aSupernode-like Formulation of Circuit Equations,” in Proc. IEEE International Conference on Solid State and Integrated Circuit Technology (ICSICT), pp. 1432-1434, 2006.
  • C1ChengZhuo, Jiang Hu, andKangshengChen, “An Improved AMG-based Method for Fast Power Grid Analysis,” in Proc. IEEE/ACM International Symposium on Quality Electronic Design (ISQED), pp. 290-295, 2006.

榮譽獎項

ACM SIGDA技術領袖獎
2016 DAC會議最佳論文提名獎
2017 JSPS Invitation Fellowship
2018 CSTIC會議最佳學生論文提名獎
2018 DAC系統設計大賽第二名
2018/10 課題組劉仲陽獲國家獎學金
2018/06/23 鄧佳寧榮獲DAC系統設計大賽第二名
2018/06/23 高迪獲得DAC牛頓獎學金
曾獲得ACM SIGDA技術領袖獎，DAC'16及CSTIC’18最佳論文提名獎，2017年JSPS Invitation Fellowship, 2018年DAC系統設計大賽第二名。

相關詞條

熱門詞條

聯絡我們