《60GHz CMOS鎖相環技術》是2012年科學出版社出版的圖書，作者是齊瑪。
基本介紹
- 書名：60GHz CMOS鎖相環技術
- 作者：（德）齊瑪
- ISBN：9787030344762
- 頁數：197
- 定價：50.00元
- 出版社：科學出版社
- 出版時間：2012-6
- 副標題：60GHzCMOS鎖相環技術
內容簡介,目錄,
內容簡介
《國外電子信息精品著作:60GHzCMOS鎖相環技術(影印版)》內容簡介：近年來，毫米波尤其是60GHz頻率段的高數據無線傳輸套用已經備受關注。而在毫米波CMOS電路設計時布線和測量所面臨的問題需要科研人員認真解決。《國外電子信息精品著作:60GHzCMOS鎖相環技術(影印版)》重點闡述了60GHz無線收發器技術面臨的技術挑戰，並提出了解決方案。
目錄
1 Introduction
2 Synthesizer System Architecture
2.1 IEEE 802.15.3c Channelization
2.2 60 GHz Frequency Conversion Techniques
2.3 Proposed PLL Architecture: Flexible, Reusable, Multi-frequency
2.3.1 Utilization in WiComm Project
2.4 System Analysis and Design
2.4.1 Phase-Lock Loop Basics
2.4.2 Frequency Planning
2.4.3 Synthesizer Parameters
2.5 System Simulations
2.6 Target Specifications
2.7 Summary
3 Layout and Measurements at mm-Wave Frequencies
3.1 Layout Problems and Solutions
3.1.1 Impact ofParasitics
3.1.2 Mismatch Due to Layout Asymmetry and Device Orientation
3.1.3 Substrate Losses.
3.1.4 Cross Talk Shielding and Grounding
3.2 Measurement Setups
3.2.1 Dedicated Instrumentation
3.2.2 Calibration and De-embedding
3.2.3 Stability and Repeatability
3.3 Conclusions
4 Design ofHigh Frequency Components
4.1 Prescaler
4.1.1 Overview and Comparison of Prescaler Architectures
4.1.2 35 GHz Static Frequency Divider
4.1.3 40 GHz Divide-by-2 ILFD
4.1.4 60 GHz Divide-by-3 ILFD
4.1.5 Monolithic Transformer Design and Measurement
4.1.6 Dual-Mode （Divide-by-2 and Divide-by-3）ILFD
4.1.7 ILFD figure-of-Merit （FOM）
4.1.8 Summary
4.2 Voltage Controlled Oscillator
4.2.1 Overview of VCO Architectures
4.2.2 Theoretical Analysis ofLC-VCOs
4.2.3 40 GHz LC VCO
4.2.4 60 GHz Actively Coupled I-Q VCO
4.2.5 60 GHz Transformer Coupled I-Q VCO
4.2.6 Dual-Band VCO for 40 and 60 GHz
4.3 Synthesizer Front-Ends.
4.3.1 40 GHz VCO and Divide-by-2 ILFD
4.3.2 60 GHz VCO and Divide-by-3 ILFD
4.4 Conclusions
5 Design ofLow Frequency Components
5.1 Feedback Division
5.1.1 CML Based Divider Chain
5.1.2 MixerBasedDivision
5.2 Phase-Frequency Detector, Charge-Pump and Loop Filter
5.3 Conclusions
6 Synthesizer Integration
6.1 Synthesizer for 60 GHz Sliding-IF Frequency Conversion
6.1.1 Comparison to Target Specifications
6.2 Synthesizer with Down-Conversion Mixer in Feedback Loop
6.3 Dual-Mode Synthesizer
6.4 Conclusions
7 Conclusions
Appendix
Appendix A
A Travelling Wave Divider Simulation Results
Appendix B
B LC-VCOs Theory
References
2 Synthesizer System Architecture
2.1 IEEE 802.15.3c Channelization
2.2 60 GHz Frequency Conversion Techniques
2.3 Proposed PLL Architecture: Flexible, Reusable, Multi-frequency
2.3.1 Utilization in WiComm Project
2.4 System Analysis and Design
2.4.1 Phase-Lock Loop Basics
2.4.2 Frequency Planning
2.4.3 Synthesizer Parameters
2.5 System Simulations
2.6 Target Specifications
2.7 Summary
3 Layout and Measurements at mm-Wave Frequencies
3.1 Layout Problems and Solutions
3.1.1 Impact ofParasitics
3.1.2 Mismatch Due to Layout Asymmetry and Device Orientation
3.1.3 Substrate Losses.
3.1.4 Cross Talk Shielding and Grounding
3.2 Measurement Setups
3.2.1 Dedicated Instrumentation
3.2.2 Calibration and De-embedding
3.2.3 Stability and Repeatability
3.3 Conclusions
4 Design ofHigh Frequency Components
4.1 Prescaler
4.1.1 Overview and Comparison of Prescaler Architectures
4.1.2 35 GHz Static Frequency Divider
4.1.3 40 GHz Divide-by-2 ILFD
4.1.4 60 GHz Divide-by-3 ILFD
4.1.5 Monolithic Transformer Design and Measurement
4.1.6 Dual-Mode （Divide-by-2 and Divide-by-3）ILFD
4.1.7 ILFD figure-of-Merit （FOM）
4.1.8 Summary
4.2 Voltage Controlled Oscillator
4.2.1 Overview of VCO Architectures
4.2.2 Theoretical Analysis ofLC-VCOs
4.2.3 40 GHz LC VCO
4.2.4 60 GHz Actively Coupled I-Q VCO
4.2.5 60 GHz Transformer Coupled I-Q VCO
4.2.6 Dual-Band VCO for 40 and 60 GHz
4.3 Synthesizer Front-Ends.
4.3.1 40 GHz VCO and Divide-by-2 ILFD
4.3.2 60 GHz VCO and Divide-by-3 ILFD
4.4 Conclusions
5 Design ofLow Frequency Components
5.1 Feedback Division
5.1.1 CML Based Divider Chain
5.1.2 MixerBasedDivision
5.2 Phase-Frequency Detector, Charge-Pump and Loop Filter
5.3 Conclusions
6 Synthesizer Integration
6.1 Synthesizer for 60 GHz Sliding-IF Frequency Conversion
6.1.1 Comparison to Target Specifications
6.2 Synthesizer with Down-Conversion Mixer in Feedback Loop
6.3 Dual-Mode Synthesizer
6.4 Conclusions
7 Conclusions
Appendix
Appendix A
A Travelling Wave Divider Simulation Results
Appendix B
B LC-VCOs Theory
References
