教授，國家級青年人才，研究方向為功率半導體器件與功率集成技術，主持國家自然科學基金面上項目、青年基金項目，參與國家科技重大專項、國家自然科學基金及多項橫向合作課題項目。在本領域頂級期刊IEEE EDL和IEEE TED發表論文22篇，論文3次入選IEEE EDL封面Highlight論文，獲IEEE CDS Excellent Student Paper Award優秀論文獎；連續在本領域頂級國際會議IEEE ISPSD作大會報告5次，在IEEE ICSICT作邀請報告；申請發明專利83項，授權41項，含美國專利2項；獲工信部技術發明二等獎、中國產學研合作創新成果二等獎，電子科技大學學術新人獎、電子科技大學“青年人才學術托舉工程”、四川省優秀畢業生、中國電子學會優秀博士論文獎，並由此入選2020年該學會首屆“電子信息前沿青年學者出版工程”，出版專著《功率超結器件》，同時獲工信部學術出版基金和國家出版基金資助。
基本介紹
- 中文名：章文通
- 學位/學歷：博士
- 職業：教師
- 專業方向：功率半導體器件與功率積體電路
- 任職院校：電子科技大學
個人經歷,研究方向,榮譽獎勵,學術成果,主講課程,
個人經歷
教育背景
2012.09－2016.12，電子科技大學，微電子學與固體電子學專業，博士學位
2010.09－2012.06，電子科技大學，電子與通信工程專業，碩博連讀
2006.09－2010.06，電子科技大學，微電子技術專業，學士學位
工作履歷
2017/02-至今，電子科技大學，專任教師
研究方向
(1)超結SJ功率半導體器件
(2)勻場耐壓層HOF器件
(3)禁止柵Split-gate器件
榮譽獎勵
(1) 中國產學研合作創新成果二等獎
(2) 工信部技術發明二等獎
(3) 電子科技大學學術新人獎
(4) 中國電子學會優秀博士學位論文獎
(5) IEEE CDS Excellent Student Paper Award
學術成果
功率半導體始終是電能變換的心臟，是智慧電能管理的核心，更是節能減排的關鍵和基礎器件，通過理論與實驗相結合，獲得代表性學術成果如下：
(1) 提出超結器件最低比導通電阻Ron,min理論，包括“三新”：新模式（NFD模式）、新模型（ES模型）和新方法（Ron,min法）；獲得理論最低比導通電阻Ron,min，使半導體材料實現理想“準線性”關係。理論指導研製的橫向超結器件Ron,sp較同類器件降低67.8%；
(2)提出新型勻場HOF耐壓層，在傳統耐壓層內部引入周期性MIS結構，實現器件表面及體內電場均勻化，研製的HOF器件Ron,sp較傳統Triple RESURF器件理論極限降低33.8%；
(3)研製的禁止柵Split-gate器件比導通電阻較傳統降低28.6%；研製的納米矽器件臨界場達106.7 V/μm，遠高傳統約30 V/μm。
代表性科研項目
(1)國家自然科學基金，功率半導體非完全雪崩擊穿NFA新原理及其高臨界場新器件研究，2023/01-2026/12，在研，主持
(2)國家自然科學基金，功率半導體器件新型MIS耐壓層等勢場調製基礎理論與新結構，2021/01-2024/12，在研，主持
(3)國家自然科學基金，納米矽高臨界場的能量弛豫機理與模型探索，2018/01-2020/12，已結題，主持
(4)廣東自然科學基金，新型勻場耐壓層功率半導體器件模型與新結構，2022/01-20223/12，在研，主持
(5)重點實驗室開放項目，基於亞微米超結先進工藝的高壓集成器件研究，2022/07-2024/12，在研，主持
(6)橫向項目， FS型IGBT技術開發，2018/07-2019/10，已結題，主持
(7)博士後面上項目，高功率半超結器件最低比導通電阻Ron,min理論與新結構，2018/05-2021/04，已結題，主持
(8)廣東自然科學基金，部分超結器件最低比導通電阻全域最佳化模型與新結構研究，2018/01-2020/12，已結題，主持
(9)中央高校啟動金，超薄SOI器件臨界場模型與部分超結新結構研究，2017/05-2018/12，已結題，主持
(10) 國家自然科學基金，對稱極化摻雜增強型功率GaN HFET機理與工藝實現研究，2019/01-2022/12，在研，主研
(11) 四川省科技計畫項目，低功耗新結構超結VDMOS晶片關鍵技術及套用，2019/01-2020/12，已結題，主研
(12) 四川省科技計畫項目，橫向功率高壓器件縱向結型耐壓層最佳化設計模型與新結構研究（重點），2018/01-2020/12，已結題，主研
(13) 橫向項目，智慧型高側電源開關產品開發及技術平台建設和專項研究，2018/11-2021/12，在研，主研
(14) 橫向項目，600V SOI高壓集成器件研發，2018/08-2019/06，已結題，主研
代表性論文
期刊論文
(1) Wentong Zhang*, Jiamin He, Qiyi Wu, Nailong He, Sen Zhang, Ming Qiao, Zhaoji Li, Bo Zhang,“A New Multi-Dimensional Depletion Concept of Homogenization Field Devices,” IEEEElectron Device Letters, vol. 44, no. 10, pp. 1708-1711, Oct. 2023.
(2)Wentong Zhang*, Ning Tang, Yuting Liu, Yang Yu, Nailong He, SenZhang, Ming Qiao, Zhaoji Li, and Bo Zhang, “Unipolar Conductivity Enhancementand Its Experiments in SOI-LIGBT,” IEEE Transactions on Electron Devices,vol. 70, no. 4, pp. 1843-1848, April 2023.
(3)Wentong Zhang*, Fengrun Tian, Yuting Liu, Teng Liu, Nailong He,Sen Zhang, Ming Qiao, Zhaoji Li, and Bo Zhang, “Experiments of Sub-MicronSuperjunction Devices With Ultra-Low Specific On-Resistance,” IEEEElectron Device Letters, vol. 44, no. 7, pp. 1160-1163, July 2023.
(4)Wentong Zhang*, Ke Zhang, Lingying Wu, Yan Sun, Xinkai Guo, ZhuoWang, Ming Qiao, Zhaoji Li, and Bo Zhang, “The Minimum Specific On-Resistanceof 3-D Superjunction Devices,” IEEE Transactions on Electron Devices,vol. 70, no. 3, pp. 2528-2533, Mar. 2023.
(5)Wentong Zhang*, Le Zhu, Fengrun Tian, Jie Luo, Nailong He, ZhiliZhang, Sen Zhang, Jinping Zhang, Ming Qiao, Zhaoji Li, Bo Zhang, “Experimentsof Homogenization Field LDMOS With Trench-Stopped Depletion,” IEEETransactions on Electron Devices, vol. 69, no. 5, pp. 2528-2533, May2022.
(6)Wentong Zhang*, Yang Wu, Ke Zhang, Ming Qiao, Sen Zhang, NailongHe, Zhili Zhang, Zhaoji Li, and Bo Zhang, “Experiments of a Lateral PowerDevice With Complementary Homogenization Field Structure,” IEEE Electron Device Letters,vol. 42, no. 11, pp. 1638-1641, Nov. 2021.
(7)Wentong Zhang*, Xuhan Zhu, Ming Qiao, Zhuo Wang, Guangsheng Zhang, Zhili Zhang, NailongHe, Sen Zhang, Zhaoji Li, Bo Zhang, “Analytical Model and Mechanism ofHomogenization Field for Lateral Power Devices”, IEEE Transactions on Electron Devices, vol. 68, no. 8, pp.3956-3962, Aug. 2021.
(8)Wentong Zhang*, Kun Yang, Xuhan Zhu, Sen Zhang, Boyong He, Zhuo Wang, Ming Qiao, ZhaojiLi, Bo Zhang, “Analytical Design and Experimental Verification of LateralSuperjunction Based on Global Region Normalization Method”, IEEE Transactions on Electron Devices,vol. 68, no. 5, pp. 2372-2377, May 2021.
(9)Wentong Zhang*, Junqing He, Shikang Cheng, Sen Zhang, Boyong He, Ming Qiao, Zhaoji Li, andBo Zhang, “Novel Self-Modulated Lateral Superjunction Device Suppressing the Inherent3-D JFET Effect,” IEEE Electron DeviceLetters, vol. 41, no. 9, pp.1392-1395, Sept. 2020.
(10) Wentong Zhang*, Rui Wang, Shikang Cheng, Yan Gu, Sen Zhang, Boyong He, Ming Qiao, Zhaoji Li,Bo Zhang, “Optimization and Experiments of Lateral Semi-Superjunction Device Basedon Normalized Current-Carrying Capability,” IEEE Electron Device Letters, vol. 40, no. 12, pp. 1969-1972,Dec. 2019.
(11) Wentong Zhang*, Lu Li,Ming Qiao, Zhenya Zhan, Shikang Cheng, Sen Zhang, Boyong He, Xiaorong Luo, ZhaojiLi, Bo Zhang, “A Novel High Voltage Ultra-Thin SOI-LDMOS With Sectional LinearlyDoped Drift Region,” IEEE Electron DeviceLetters, vol. 40, no. 7, pp. 1151-1154, July 2019.
(12) Wentong Zhang*, Li Ye, Dong Fang, Ming Qiao, Kui Xiao, Boyong He, Zhaoji Li, and Bo Zhang,“Model and Experiments of Small-Size Vertical Devices With Field Plate,” IEEE Transactions on Electron Devices,vol. 66, no. 3, pp. 1416-1421, March 2019.
(13) Wentong Zhang*, ChunlanLai, Ming Qiao, Zhaoji Li, and Bo Zhang, “The Minimum Specific on-Resistance ofSemi-SJ Device,” IEEE Transactions on ElectronDevices, vol. 66, no. 1, pp. 598-604, Jan. 2019.
(14) Wentong Zhang*, ZhenyaZhan, Yang Yu, Shikang Cheng, Yan Gu, Sen Zhang, Xiaorong Luo, Zehong Li, Ming Qiao,Zhaoji Li, and Bo Zhang. “Novel Superjunction LDMOS (>950 V) With a Thin LayerSOI,” IEEE Electron Device Letters,vol. 38, no. 11, pp. 1555-1558, Nov. 2017.
(15) Wentong Zhang*, Bo Zhang,Ming Qiao, Zehong Li, Xiaorong Luo and Zhaoji Li. “Optimization and new structureof super junction with isolator layer,” IEEETransactions on Electron Devices, vol. 64, no. 1, pp. 217-223, Jan.2017.
(16) Wentong Zhang*, Bo Zhang,Ming Qiao, Zehong Li, Xiaorong Luo and Zhaoji Li. The Ron,min of balancedsymmetric vertical super junction based on R-well model, IEEE Transactions on Electron Devices,vol. 64, no. 1, pp. 224-230, Jan. 2017.
(17) Wentong Zhang*, Bo Zhang,Ming Qiao, Zehong Li, Xiaorong Luo and Zhaoji Li, “Optimization of Lateral SuperJunction based on the Minimum Specific On-resistance,” IEEE Transactions on Electron Devices, vol. 63, no. 5, pp. 1984-1990,May. 2016.
(18) Wentong Zhang*, Bo Zhang,Zehong Li, Ming Qiao and Zhaoji Li, “Theory of Super Junction with NFD and FD Modesbased on Normalized Breakdown Voltage,” IEEETransactions on Electron Devices, vol. 62, no. 12, pp. 4114-4120, Dec. 2015.
(19) Wentong Zhang*, Bo Zhang,Ming Qiao, Lijuan Wu, Kun Mao and Zhaoji Li, “A Novel Vertical Field Plate LateralDevice with Ultra-low Specific On-resistance,” IEEE Transactions on Electron Devices, vol. 61, no. 2, pp. 518-524,Feb. 2014.
(20) Wentong Zhang*, LijuanWu, Ming Qiao, Xiaorong Luo, Bo Zhang and Zhaoji Li, “Novel high-voltage power lateralMOSFET with adaptive buried electrodes,” Chinese Physics B, vol. 21, no. 7, pp.444-449, 2012.
(21) Bo Zhang*, WentongZhang, Jian Zu, Ming Qiao, Sen Zhang, Zhili Zhang, Boyong He, Zhaoji Li,“Novel Homogenization Field Technology in Lateral Power Devices,” IEEE Electron Device Letters, vol. 41, no. 11, pp. 1677-1680, Nov.2020.
(22) Bo Zhang*, Wentong Zhang, ZehongLi, Ming Qiao and Zhaoji Li, “Equivalent Substrate Model for Lateral Super JunctionDevice,” IEEE Transactions on ElectronDevices, vol. 61, no. 2, pp. 525-532, Feb. 2014.
(23) Bo Zhang*, WentongZhang, Le Zhu, Jian Zu, Ming Qiao, Zhaoji Li, “Review of technologiesfor high-voltage integrated circuits,” Tsinghua Science and Technology, vol.27, no. 3, pp. 495-511, Jun. 2022. (特邀綜述)
(24) Bo Zhang*, Wentong Zhang, Song Pu, MingQiao, and Zhaoji Li, “Superjunction power semiconductor devices (in Chinese),” Micro/nanoElectronics and Intelligent Manufacturing, vol. 1, no. 1, pp: 5-19,Mar. 2019. (創刊號-特邀綜述)
(25) Bo Zhang*, Wentong Zhang, Ming Qiao, ZhenyaZhan, and Zhaoji Li, “Concept and design of super junction devices,” Journalof Semiconductors, vol. 39, no. 2, pp: 021001-1-021001-12, 2018. (特邀綜述)
(26) Bo Zhang*, Wentong Zhang, Ming Qiao,and Zhaoji Li, “Theory and optimization of the power super junction device (inChinese),” Sci Sin-Phys Mech Astron,vol. 46, no. 10, pp: 107302-1-107302-18, 2016. (特邀綜述)
(27) Changwang Wang, Xuan Li*, Lingfeng Li, XiaochuanDeng, Wentong Zhang*, LiuZheng, Yansheng Zou, Weining Qian, Zhaoji Li, Bo Zhang, “Performance Limit andDesign Guideline of 4H-SiC Superjunction Devices Considering Anisotropy ofImpact Ionization,” IEEE Electron Device Letters, vol. 43, no. 12, pp. 2025-2028, Oct.2022.
會議論文
(1) Wentong Zhang, Shiyao Cai, Lingying Wu, Nailong He, Sen Zhang,Ming Qiao, Zhaoji Li and Bo Zhang*, “Novel Constant Surface ConcentrationDepletion Mechanism and Its Experiments in Homogenization field LDMOS,” 16thInternational Seminar on Power Semiconductors (ISPS), pp. 149-153, Aug.2023.
(2) 章文通, 功率半導體器件電荷場調製機制與設計方法, 華為無線Massive MIMO技術論壇, 邀請報告
(3) Wentong Zhang, Zhaoji Li, Bo Zhang*, “A New Type of HomogenizationField Power Semiconductor Devices,” IEEE 16th International Conference onSolid-State and Integrated Circuit Technology (ICSICT), 2022, pp. 978-1-6654-6906-7(Invited Oral).
(4)Wentong Zhang*, Jian Zu, Xuhan Zhu, Sen Zhang, Zhili Zhang, NailongHe, Boyong He, Ming Qiao, Zhaoji Li, and Bo Zhang, “Mechanism and Experiments ofa Novel Dielectric Termination Technology Based on Equal-potential Principle,” IEEE 32st International Symposium on Power SemiconductorDevices and ICs (ISPSD), pp. 38-41, Sep. 2020. (Oral).
(5)Wentong Zhang*, Song Pu, Chunlan Lai, Li Ye, Shikang Cheng, Sen Zhang,Boyong He, Zhuo Wang, Xiaorong Luo, Ming Qiao, Zhaoji Li, and Bo Zhang, “Non-full Depletion Mode and its Experimental Realization of theLateral Superjunction,” IEEE 30stInternational Symposium on Power Semiconductor Devices and ICs (ISPSD),pp. 475-478, May. 2018. (Oral).
(6)Wentong Zhang*, Ming Qiao, Lijuan Wu, Ke Ye, Zhuo Wang, Zhigang Wang, Xiaorong Luo, Sen Zhang,Wei Su, Bo Zhang, and Zhaoji Li, “Ultra-low Specific On-resistance SOI High VoltageTrench LDMOS with Dielectric Field Enhancement Based on ENBULF Concept,” IEEE 25th International Symposium on PowerSemiconductor Devices and ICs (ISPSD), pp. 329-332, May. 2013. (Oral).
(7)Teng Liu, Wentong Zhang,Zhili Zhang, Hua Song, Nailong He, Sen Zhang, Zhaoji Li and Bo Zhang*, “NewVariable Selective Etching Technology for Thick SOI Devices,” IEEE16th International Conference on Solid-State and Integrated Circuit Technology(ICSICT), 2022, pp. 978-1-6654-6906-7 (Oral)
(8)Nailong He, Sen Zhang, Hao Wang, Jingchuan Zhao, Long Zhang, Siyang Liu, WeifengSun, Quanyu Zhao, Ning Tang, WentongZhang, Zhaoji Li, Bo Zhang, “Ultra-high Voltage BCD TechnologyIntegrated 1000 V 3-D Split-Superjunction devices,” IEEE 34th InternationalSymposium on Power Semiconductor Devices and ICs (ISPSD), 2022, pp.305-308. (Oral).
(9)Nailong He*, Sen Zhang, Xuhan Zhu, Xuchao Li, Hao Wang, Wentong Zhang, and Boyong He, “A0.25 μm 700 V BCD Technology with Ultra-low Specific On-resistance SJ-LDMOS,” IEEE 32st International Symposium on Power SemiconductorDevices and ICs (ISPSD), pp. 419-422, Sep. 2020.Guangsheng Zhang, Wentong Zhang*,Junqing He, Xuhan Zhu, Sen Zhang, Jingchuan Zhao, Zhili Zhang, Ming Qiao, Xin Zhou,Zhaoji Li, and Bo Zhang, “Experiments of a Novel low on-resistance LDMOS with 3-DFloating Vertical Field Plate,” IEEE 31stInternational Symposium on Power Semiconductor Devices and ICs (ISPSD),pp. 507-510, May. 2019. (Oral).
其他論文
(1) Teng Liu, Tianlong Wen, Wentong Zhang, Nailong He, Sen Zhang, Hua Song, “Design ofLDMOS Device Modeling Method Based on Neural Network,” ComputationalIntelligence and Neuroscience, Vol. 2022, pp. 1-10, Aug. 2022.
(2) L.J. Wu, W.T. Zhang, M. Qiao, B. Zhangand Z.J. Li, “SOI SJ high voltage device with linear variable doping interface thinsilicon layer,” Electronics Letters, vol. 48, no. 5, pp. 297-298, Mar. 2012.
(3) Wu Lijuan, Zhang Wentong, Zhang Bo andLi Zhaoji, “A high voltage SOI PLDMOS with a Partical interface equipotential floatingburied layer,” Journal of semiconductors, vol. 34, no. 7, pp: 074009(1-5), Jul.2013.
(4) Wu Lijuan, Zhang Wentong, ZhangBo, Li Zhaoji, “A Novel Silicon-on-Insulator Super-Junction Lateral-Double-DiffusedMetal-Oxide-Semiconductor Transistor with T-Dual Dielectric Buried Layers,” ChinesePhysics Letters, Vol. 30, No. 12, 127102(1-4), 2013.
(5) Wu Lijuan, Zhang Wentong, Zhang Bo andLi Zhaoji, “A novel SOI high-voltage SJ-pLDMOS based on self-adaptive charge balance,”Journalof semiconductors, vol. 35, no. 2, pp: 024004(1-5), Feb. 2014.
(6) Kun Mao, Ming Qiao, WenTong Zhang, BoZhang and Zhaoji Li, “A 700 V narrow channel nJFET with low pinch-off voltage andsuppressed drain-induced barrier lowering effect,” Superlattices and Microstructures,vol. 75, no. 2, pp: 576–585, Nov. 2014.
(7) Qiao Ming, Zhuang Xiang, Wu Lijuan, Zhang Wentong,Wen Hengjuan, Zhang Bo, Li Zhaoji, “Breakdown voltage model and structure realizationof the thin silicon layer linear variable doping SOI high voltage device with multiplestep field plates,” Chinese Physics B, Vol. 21 No. 10, 108502(1-8), 2012.
主要發明專利
授權專利：
(1) Wentong Zhang, Ning Tang, Ke Zhang, Nailong He, Ming Qiao, Zhaoji Li, Bo Zhang, SOIlateral homogenization field high voltage power semiconductor device,manufacturing method and application thereof, 2024.01.30, 美國, US 11,888,022 B2
(2) 章文通, 吳暘, 唐寧, 喬明, 李肇基, 張波, 集成亞微米超結的橫向功率半導體器件及其製造方法, ZL202110956767.1, 2023.10.31
(3) 章文通, 唐寧, 張科, 劉雨婷, 喬明, 何乃龍, 張森, 李肇基, 張波, 一種高壓集成功率半導體器件及其製造方法, ZL202210447055.1, 2023.10.27
(4) 章文通, 張科, 唐寧, 田豐潤, 喬明, 何乃龍, 張森, 李肇基, 張波, 一種全隔離襯底耐壓功率半導體器件及其製造方法, ZL202210447123.4, 2023.10.03
(5) 章文通, 吳暘, 張科, 何乃龍, 喬明, 李肇基, 張波, SOI橫向勻場高壓功率半導體器件及製造方法和套用, ZL202110952823.4, 2023.05.26
(6) 章文通, 吳暘, 唐寧, 喬明, 李肇基, 張波, 體內異性摻雜的功率半導體器件及其製造方法, ZL202110955840.3, 2023.05.26
(7) 章文通, 吳暘, 唐寧, 喬明, 李肇基, 張波, 具有無結終端技術功率半導體器件及製造方法和套用, ZL202110964582.5, 2023.03.28
(8) 章文通, 朱旭晗, 祖健, 喬明, 李肇基, 張波, 一種SOI橫向絕緣柵雙極電晶體, ZL202010888909.0, 2022.08.23
(9) 章文通, 祖健, 朱旭晗, 喬明, 李肇基, 張波, 具有等勢浮空槽的低阻器件及其製造方法, ZL202010888774.8, 2022.03.08
(10) 章文通, 朱旭晗, 祖健, 喬明, 李肇基, 張波, 消除體內曲率效應的等勢降場器件及其製造方法, ZL202010888944.2, 2022.03.08
(11) 章文通, 楊昆, 何俊卿, 王睿, 張森, 喬明, 王卓, 張波, 李肇基, 一種橫向高壓功率半導體器件的槽型終端結構, ZL201910837060.1, 2022.01.25
(12) 章文通, 葉力, 方冬, 李珂, 林祺, 喬明, 張波, 具有體內場板的分離柵VDMOS器件及其製造方法, ZL201810967996.1, 2021.11.23
(13) 章文通, 蒲松, 葉力, 賴春蘭, 喬明, 李肇基, 張波, 基於超結的集成功率器件及其製造方法, ZL201810394937.X, 2021.09.07
(14) 章文通, 朱旭晗, 祖健, 喬明, 李肇基, 張波, 具有階梯分立禁止槽的低柵電荷器件及其製造方法, ZL202010890066.8, 2021.08.24
(15) 章文通, 蒲松, 葉力, 賴春蘭, 喬明, 李肇基, 張波, 基於超結自隔離的耗盡型增強型集成功率器件及製造方法, ZL201810395835.X, 2021.07.02
(16) 章文通, 何俊卿, 王睿, 楊昆, 喬明, 王卓, 張波, 李肇基, 分離柵VDMOS器件的終端結構, ZL201910819894.X, 2021.04.23
(17) 章文通, 何俊卿, 王睿, 楊昆, 喬明, 王卓, 張波, 李肇基, 具有低比導通電阻的槽型器件及其製造方法, ZL201910819845.6, 2021.04.20
(18) 章文通, 楊昆, 何俊卿, 王睿, 喬明, 王卓, 張波, 李肇基, 一種IGBT功率器件, ZL201910836723.8, 2021.03.30
(19) 章文通, 何俊卿, 楊昆, 王睿, 張森, 喬明, 張波, 李肇基, 具有深埋層的縱向浮空場板器件及製造方法, ZL201910819950.X, 2021.03.16
(20) 章文通, 何俊卿, 楊昆, 王睿, 張森, 喬明, 張波, 李肇基, 具有電荷平衡耐壓層的縱向浮空場板器件及其製造方法, ZL201910819934.0, 2021.01.22
(21) 章文通, 楊昆, 何俊卿, 王睿, 張森, 喬明, 王卓, 張波, 李肇基, 一種超結LIGBT功率器件, ZL201910836726.1, 2021.01.22
(22) 章文通, 余洋, 李珂, 詹珍雅, 梁龍飛, 喬明, 張波, 一種高耐壓橫向超結器件, ZL201710642237.3, 2020.12.29
(23) 章文通, 詹珍雅, 肖倩倩, 余洋, 王正康, 喬明, 一種SOI橫向高壓器件, ZL201710203874.0, 2020.07.10
(24) 章文通, 詹珍雅, 李珂, 余洋, 梁龍飛, 喬明, 張波, 一種消除高電場的器件, ZL201710642100.8, 2020.03.31
(25) 張波, 章文通, 陳鋼, 喬明, 李肇基, 一種具有超低比導通電阻特性的高壓功率器件, 2016.10.05, 中國, ZL201410424546.X
(26) 喬明, 余洋, 章文通, 王正康, 詹珍雅, 張波, 一種橫向高壓器件, ZL201710496712.0, 2021.06.08
(27) 喬明, 章文通, 黃琬琰, 余洋, 張波, 一種超結半導體器件終端結構, ZL201610353060.0
(28) 喬明, 章文通, 李燕妃, 李肇基, 張波, 一種超低比導通電阻的橫向高壓器件, 2016.08.31, 中國, ZL201310743344.7
(29) 喬明, 章文通, 薛騰飛, 祁嬌嬌, 張波, 一種橫向高壓器件漂移區的製造方法, 2016.04.06, 中國, ZL201310526919.X
(30) 喬明, 章文通, 黃軍軍, 張波, 一種橫向高壓超結功率半導體器件, 2016.05.11, 中國, ZL201310421765.8
(31) 喬明, 蔡林希, 章文通, 胡利志, 張波, 一種部分SOI超結高壓功率半導體器件, 2016.08.31, 中國, ZL201310345306.6
(32) 喬明, 許琬, 章文通, 李燕妃, 何逸濤, 張昕, 張波, 一種橫向恆流二極體, 2016.01.20, 中國, ZL201310275984.X
(33) 喬明, 許琬, 張昕, 章文通, 李燕妃, 吳文杰, 張波, 一種低正向壓降的二極體, ZL201310380184.4
(34) 喬明, 蔡林希, 章文通, 李燕妃, 張波, 一種超結LDMOS器件, 2015.04.15, 中國, ZL201310077827.8
(35) 喬明, 李燕妃, 章文通, 吳文杰, 許琬, 蔡林希, 陳濤, 胡利志, 黃健文, 張波, 一種橫向高壓功率半導體器件, 2015.08.19, 中國, ZL201210516539.3
(36) 喬明, 章文通, 李燕妃, 許琬, 蔡林希, 吳文杰, 陳濤, 胡利志, 黃健文, 張波, 一種橫向超結高壓功率半導體器件, 2015.08.19, 中國, ZL201210516380.5
(37) 喬明, 章文通, 許琬, 李燕妃, 張昕, 吳文杰, 張波, 一種超低比導通電阻的SOI橫向高壓功率器件, 2015.09.09, 中國, ZL201210518182.2
(38) 喬明, 周鋅, 溫恆娟, 何逸濤, 章文通, 向凡, 葉俊, 張波, 一種用於SOI高壓積體電路的半導體器件, 2013.07.17, 中國, ZL201110318010.6
(39) 喬明, 銀杉, 趙遠遠, 章文通, 溫恆娟, 向凡, 周鋅, 一種基於N型外延層的BCD集成器件及其製造方法, 2012.11.07, 中國, ZL201110105986.5
(40) 王卓, 祖健, 朱旭晗, 章文通, 方冬, 喬明, 李肇基, 張波, 具有高可靠性的分離柵VDMOS器件及其製造方法, ZL202010888687.2, 2023.01.24
(41) Ming Qiao, Yang Yu, Wentong Zhang, Zhengkang Wang, Zhenya Zhan,Bo Zhang, Lateral high-voltage device, 2018.09.04, 美國, US10068965B1
主講課程
《半導體物理A》
