屈萬園

屈萬園，男，博士，浙江大學微納電子學院教授。

基本介紹

• 中文名：屈萬園
• 畢業院校：韓國科學技術院（KAIST）
• 學位/學歷：博士
• 職業：教師
• 專業方向：數模混合積體電路設計、電源管理晶片、高性能放大器
• 就職院校：浙江大學微納電子學院

簡介

浙江大學積體電路學院、工程師學院教授，教育部青年長江學者。博士畢業於韓國科學技術院（KAIST），2008至2017年就職於韓國LG公司，於2017年起加入浙江大學，長期從事電源管理晶片設計研究工作。領導量產了多款國際領先的電源管理晶片，獲授權美國專利9項、中國專利3項，均實現規模化套用。發表積體電路設計領域最高水平國際固態電路會議（ISSCC）及固態電路期刊（JSSC）論文多篇，發表浙江大學首篇ISSCC論文，指導獲評ISSCC 2021年度絲綢之路獎、ISSCC 2022年電源管理亮點論文，目前擔任多個IEEE高水平會議技術委員會成員。。

學習經歷

2012-2016年，韓國科學技術院（KAIST）, 工學博士

2006-2008年，韓國科學技術院（KAIST）, 工學碩士

2002-2006年，北京郵電大學，工學學士

主講課程

電子線路基礎，本科生基礎課程，浙江大學信息與電子工程學院

模擬與混合積體電路設計，研究生專業學位課，浙江大學信息與電子工程學院、工程師學院

研究成果

會議論文

[1] X. Yang, L. Zhao, M. Zhao, Z. Tan, Y. Ding, W. Li, W. Qu, “5A 94.5% Peak Efficiency 9~16V-to-1V Dual-Path Series-Capacitor Converter with Full Duty Range and Low V.A Metric,” IEEE International Solid- State Circuits Conference (ISSCC), San Francisco, CA, USA, 2023, pp. 196-198.

[2] G. Zhang, B. Zhang, S. Shao, W. Qu, "A Load Adaptive Intelligent IGBT Gate Drive," International Conference on Power Electronics and ECCE Asia (ICPE 2023 - ECCE Asia), Jeju Island, Republic of Korea, 2023, pp. 3294-3299.

[3] X. Yang, L. Zhao, M. Zhao, Z. Tan, L. He, Y. Ding, W. Li and W. Qu, "A 5V Input 98.4% Peak Efficiency Reconfigurable Capacitive-Sigma Converter With Greater than 90% Peak Efficiency for the Entire 0.4~1.2V Output Range," IEEE International Solid- State Circuits Conference (ISSCC), San Francisco, CA, USA, 2022, pp. 108-110.

[4] Y. Hu, Y. Zhao, W. Qu, L. Ye, M. Zhao, Z. Tan, “A 2.87μW 1kHz-BW 94.0dB-SNDR 2-0 MASH ADC using FIA with Dynamic-Body- Biasing Assisted CLS Technique,” IEEE International Solid- State Circuits Conference (ISSCC), San Francisco, CA, USA, 2022, pp. 410-412.

[5] C. Xue, L. Shao, L. Zhao, X. Yang, H. Zhou, Y. Lin, Y. Ding, W. Li and W. Qu, “A Dickson Hybrid Boost Converter With On-Chip Cold-Start for Thermoelectric Energy Harvesting”, IEEE International Symposium on Circuits and Systems (ISCAS), Austin, TX, USA, 2022, pp. 2754-2757.

[6] S. Ren, C. Li, L. Zhu, W. Li, X. He, W. Qu, "Cascaded Resonant Switched Capacitor Auxiliary Power Supply for Medium Voltage DC," IEEE Applied Power Electronics Conference and Exposition (APEC), Houston, TX, USA, 2022, pp. 430-435.

[7] Y. Zhao, H. Zhang, Y. Hu, Y. Bao, L. Ye, W. Qu, M. Zhao andZ. Tan, “A 94.1 dB DR 4.1 nW/Hz Bandwidth/Power Scalable DTDSM for IoT Sensing Applications Based on Swing-Enhanced Floating Inverter Amplifiers”, IEEE Custom Integrated Circuits Conference (CICC), Austin, TX, USA, 2021, pp. 1-2

[8] X. Yang, H. Cao, C. Xue, L. He, Z. Tan, M. Zhao, Y. Ding, W. Li, W. Qu, “An 8A 998A/inch 90.2% Peak Efficiency 48V-to-1V DC-DC Converter Adopting On-Chip Switch and GaN Hybrid Power Conversion,” IEEE International Solid- State Circuits Conference (ISSCC), San Francisco, CA, USA, 2021, pp. 466-468.

[9] X. Yang, H. Cao and W. Qu, "A 9.3mV Load and 5.2mV Line transients Fast Response Buck Converter with Active Ramping Voltage Mode Control," IEEE Custom Integrated Circuits Conference (CICC), Boston, MA, USA, 2020, pp. 1-4.

[10] W. Qu, D. Gu, H. Cao, X. Yang, J. Xi, L. He, S. Dong, "A 95.3% Peak Efficiency 38mV overshoot and 5mV/A load regulation Hysteretic Boost Converter with Anti-Phase Emulate Current Control," EEE 45th European Solid State Circuits Conference (ESSCIRC), Cracow, Poland, 2019, pp. 133-136.

[11] X. Yang, W. Qu, D. Gu, H. Cao, Z. Tang, J. Xi, L. He, S. Dong, "A Fast Transient Response Slope-Adjusted Voltage Mode Buck Converter," China Semiconductor Technology International Conference (CSTIC), Shanghai, China, 2019, pp. 1-3.

[12] S. Shin, Y. Huh, Y. Ju, S. Choi, C. Shin, Y. Woo, M. Choi, S. Park, Y. Sohn, M. Ko, Y. Jo, H. Han, H. Lee, S. Park, W. Qu, G. Cho, “A 95.2% efficiency dual-path DC-DC step-up converter with continuous output current delivery and low voltage ripple”, IEEE International Solid - State Circuits Conference - (ISSCC), San Francisco, CA, USA, 2018, pp. 430-432.

[13] W. Qu, J. P. Im, H. S. Kim, and G. H. Cho, “A 0.9V 6.3μW multistage amplifier driving 500pF capacitive load with 1.34MHz GBW,” IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC), San Francisco, CA, USA, 2014, pp. 290-291.

[14] C. Jeong, W. Qu, Y. Sun, D. Yoon, S. Han, and S. Lee, “A 1.5-V, 140-uA CMOS Ultra-Low Power Common-Gate LNA”, IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Baltimore, MD, USA, 2011, pp. 1-4.

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期刊論文

[1] X. Yang, L. Zhao, Z. Tan, M. Zhao, Y. Ding, W. Li, Y. Lu, W. Qu, “A High-Efficiency Wide Output Range Reconfigurable Capacitive-Sigma DC–DC Converter,” IEEE Journal of Solid-State Circuits (JSSC), 2023, Accept.

[2] C. Xue, B. Gong, H. Xu, Y. Yu, Y. Ding, W. Li, W. Qu, “A 36-55V Input 0.6-2.5V Output Bypass-Assist Series-Capacitor Power Converter with 93.1% Peak Efficiency and 1.5mA-5A Load Range,” IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications (TCASI), 2023, Accept.

[3] S. Ren, C. Li, L. Zhu, W. Li, X. He, W. Qu, "Analysis and Modeling of Self-Powered Cascaded Resonant Switched Capacitor Power Supply for Medium-Voltage DC Systems," in IEEE Transactions on Power Electronics, vol. 38, no. 10, pp. 12859-12873, 2023, Oct. 2023.

[4] Z. Lu, H. Ji, W. Qu, L. Ye, M. Zhao, Z. Tan, "A 1 V 1.07 μW 15-Bit Pseudo-Pseudo-Differential Incremental Zoom ADC," IEEE Journal of Solid-State Circuits (JSSC), vol. 58, no. 9, pp. 2575-2584, 2023, Sep. 2023.

[5] L. Meng, Y. Hu, Y. Zhao, W.Qu, L. Ye, M. Zhao, Z. Tan, "A 1.2-V 2.87-μ W 94.0-dB SNDR Discrete-Time 2–0 MASH Delta-Sigma ADC," IEEE Journal of Solid-State Circuits (JSSC), vol. 58, no. 6, pp. 1636-1645, Jun. 2023.

[6] M. Zhao, Y. Zhao, H. Zhang, Y. Hu, Y. Bao, L. Ye, W. Qu, Z. Tan, “A 4-μW Bandwidth/Power Scalable Delta-Sigma Modulator Based on Swing-Enhanced Floating Inverter Amplifiers,” IEEE Journal of Solid-State Circuits (JSSC), vol. 57, no. 3, pp. 709-718, March 2022.

[7] H. Cao, X. Yang, C Xue, L. He, Z. Tan, M. Zhao, Y. Ding, W. Li, W. Qu, “A 12-Level Series-Capacitor 48-1V DC-DC Converter With On-Chip Switch and GaN Hybrid Power Conversion”, IEEE Journal of Solid-State Circuits (JSSC)., vol. 56, no. 12, pp. 3628–3638, Dec. 2021.

[8] H. Cao, X. Yang, W. Li, Y. Ding, W. Qu, "An Impedance Adapting Compensation Scheme for High Current NMOS LDO Design." IEEE Transactions on Circuits and Systems II: Express Briefs, vol 68, no. 7, pp. 2287-2291, Jan 2021.

[9] K. Yoon, H. Kim, W. Qu, Y. Yuk, G. Cho, “Fully Integrated Digitally Assisted Low-Dropout Regulator for a NAND Flash Memory System”, IEEE Transactions on Power Electronics, vol. 33, no. 1, pp. 388-406, Jan. 2018.

[10] W. Qu, S.Singh, Y. J.Lee, Y. S.Son, G. H.Cho, “Design-Oriented Analysis for Miller Compensation and Its Application to Multistage Amplifier Design,” IEEE Journal of Solid-State Circuits (JSSC), vol. 52, no. 2, pp. 517–527, Feb. 2017.

[11] Y. J. Lee, W. Qu, S. Singh, D. Y. Kim, K. H. Kim, S. H. Kim, J. J. Park and G. H Cho, “A 200mA Digital Low Drop-out Regulator with Coarse-Fine Dual Loop in Mobile Application Processor,” IEEE Journal of Solid-State Circuits (JSSC), vol. 52, no. 1, pp. 64-76, Jan. 2017.

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