《晶片製造——半導體工藝製程實用教程（第六版）（英文版）》是2014年11月電子工業出版社出版的圖書，作者是Peter Van Zant。
基本介紹
- 中文名：晶片製造——半導體工藝製程實用教程（第六版）（英文版）
- 作者：Peter Van Zant
- 出版時間：2014年11月
- 出版社：電子工業出版社
- ISBN：9787121243783
內容簡介,目錄,
內容簡介
本書是一本介紹半導體積體電路和器件製造技術的專業書籍，在半導體領域享有很高的聲譽。本書的範圍包括半導體工藝的每個階段：從原材料的製備到封裝、測試和成品運輸，以及傳統的和現代的工藝。全書提供了詳細的插圖和實例，每章包含回顧總結和習題，並輔以豐富的術語表。第六版修訂了微晶片製造領域的新進展，討論了用於圖形化、摻雜和薄膜步驟的先進工藝和尖端技術，使隱含在複雜的現代半導體製造材料和工藝中的物理、化學和電子的基礎知識更易理解。
本書的主要特點是避開了複雜的數學問題介紹工藝技術內容；加入了半導體業界的新成果，可以使讀者了解工藝技術發展的趨勢。
目錄
1 The Semiconductor Industry 1
Introduction 1
Birth of an Industry 1
The Solid-State Era 3
Integrated Circuits (ICs) 4
Process and Product Trends 5
Moore’s Law 6
Decreasing Feature Size 6
Increasing Chip and Wafer Size 8
Reduction in Defect Density 9
Increase in Interconnection Levels 10
The Semiconductor Industry Association Roadmap 10
Chip Cost 11
Industry Organization 11
Stages of Manufacturing 12
Six Decades of Advances in Microchip Fabrication Processes 14
The Nano Era 16
Review Topics 17
References 17
2 Properties of Semiconductor Materials and Chemicals 19
Introduction 19
Atomic Structure 19
The Bohr Atom 19
The Periodic Table of the Elements 20
Electrical Conduction 23
Conductors 23
Dielectrics and Capacitors 23
Resistors 24
Intrinsic Semiconductors 24
Doped Semiconductors 25
Electron and Hole Conduction 26
Carrier Mobility 28
Semiconductor Production Materials 29
Germanium and Silicon 29
Semiconducting Compounds 29
Silicon Germanium 31
Engineered Substrates 31
Ferroelectric Materials 31
Diamond Semiconductors 32
Process Chemicals 32
Molecules, Compounds, and Mixtures 32
Ions 33
States of Matter 34
Solids, Liquids, and Gases 34
Plasma State 34
Properties of Matter 34
Temperature 34
Density, Specic Gravity, and Vapor Density 35
Pressure and Vacuum 36
Acids, Alkalis, and Solvents 37
Acids and Alkalis 37
Solvents 38
Chemical Purity and Cleanliness 38
Safety Issues 38
The Material Safety Data Sheet 39
Review Topics 39
References 39
3 Crystal Growth and Silicon Wafer Preparation 41
Introduction 41
Semiconductor Silicon Preparation 41
Silicon Wafer Preparation Stages 42
Crystalline Materials 42
Unit Cells 43
Poly and Single Crystals 43
Crystal Orientation 44
Crystal Growth 45
Czochralski Method 45
Liquid-Encapsulated Czochralski 47
Float Zone 47
Crystal and Wafer Quality 49
Point Defects 49
Dislocations 50
Growth Defects 50
Wafer Preparation 51
End Cropping 51
Diameter Grinding 51
Crystal Orientation, Conductivity, and Resistivity Check 51
Grinding Orientation Indicators 52
Wafer Slicing 53
Wafer Marking 54
Rough Polish 54
Chemical Mechanical Polishing 55
Backside Processing 55
Double-Sided Polishing 56
Edge Grinding and Polishing 56
Wafer Evaluation 56
Oxidation 57
Packaging 57
Wafer Types and Uses 57
Reclaim Wafers 57
Engineered Wafers (Substrates) 57
Review Topics 58
References 58
4 Overview of Wafer Fabrication and Packaging 59
Introduction 59
Goal of Wafer Fabrication 59
Wafer Terminology 59
Chip Terminology 61
Basic Wafer-Fabrication Operations 63
Layering 63
Patterning 64
Circuit Design 66
Reticle and Masks 68
Doping 69
Heat Treatments 69
Example Fabrication Process 72
Wafer Sort 74
Packaging 75
Summary 75
Review Topics 76
References 76
5 Contamination Control 77
Introduction 77
The Problem 77
Contamination-Caused Problems 80
Contamination Sources 81
General Sources 81
Air 81
Clean Air Strategies 82
Cleanroom Workstation Strategy 83
Tunnel or Bay Concept 85
Micro- and Mini-Environments 86
Temperature, Humidity, and Smog 87
Cleanroom Construction 88
Construction Materials 88
Cleanroom Elements 89
Personnel-Generated Contamination 93
Process Water 94
Process Chemicals 96
Equipment 99
Cleanroom Materials and Supplies 99
Cleanroom Maintenance 100
Wafer-Surface Cleaning 100
Particulate Removal 102
Wafer Scrubbers 102
High-Pressure Water Cleaning 103
Organic Residues 103
Inorganic Residues 103
Chemical-Cleaning Solutions 104
General Chemical Cleaning 104
Oxide Layer Removal 105
Room Temperature and Ozonated Chemistries 106
Water Rinsing 108
Drying Techniques 110
Contamination Detection 112
Review Topics 112
References 113
6 Productivity and Process Yields 115
Overview 115
Yield Measurement Points 115
Accumulative Wafer-Fabrication Yield 116
Wafer-Fabrication Yield Limiters 117
Number of Process Steps 118
Wafer Breakage and Warping 118
Process Variation 119
Mask Defects 120
Wafer-Sort Yield Factors 120
Wafer Diameter and Edge Die 121
Wafer Diameter and Die Size 122
Wafer Diameter and Crystal Defects 122
Wafer Diameter and Process Variations 123
Die Area and Defect Density 124
Circuit Density and Defect Density 125
Number of Process Steps 125
Feature Size and Defect Size 125
Process Cycle Time 125
Wafer-Sort Yield Formulas 125
Assembly and Final Test Yields 128
Overall Process Yields 128
Review Topics 129
References 130
7 Oxidation 131
Introduction 131
Silicon Dioxide Layer Uses 131
Surface Passivation 131
Doping Barrier 132
Surface Dielectric 132
Device Dielectric (MOS Gates) 133
Device Oxide Thicknesses 134
Thermal Oxidation Mechanisms 134
Influences on the Oxidation Rate 137
Thermal Oxidation Methods 140
Horizontal Tube Furnaces 140
Temperature Control System 141
Source Cabinet 143
Vertical Tube Furnaces 143
Rapid Thermal Processing 146
High-Pressure Oxidation 149
Oxidant Sources 151
Oxidation Processes 154
Preoxidation Wafer Cleaning 154
Postoxidation Evaluation 155
Surface Inspection 156
Oxide Thickness 156
Oxide and Furnace Cleanliness 156
Thermal Nitridation 156
Review Topics 157
References 157
8 The Ten-Step Patterning Process—Surface Preparation to Exposure 161
Introduction 161
Overview of the Photomasking Process 162
Ten-Step Process 165
Basic Photoresist Chemistry 167
Photoresist 167
Photoresist Performance Factors 169
Resolution Capability 169
Adhesion Capability 170
Process Latitude 171
Pinholes 172
Particle and Contamination Levels 173
Step Coverage 173
Thermal Flow 173
Comparison of Positive and Negative Resists 173
Physical Properties of Photoresists 175
Solids Content 175
Viscosity 175
Surface Tension 176
Index of Refraction 176
Storage and Control of Photoresists 176
Light and Heat Sensitivity 176
Viscosity Sensitivity 177
Shelf Life 177
Cleanliness 177
Photomasking Processes—Surface Preparation to Exposure 178
Surface Preparation 178
Particle Removal 178
Dehydration Baking 178
Wafer Priming 179
Spin Priming 180
Vapor Priming 180
Photoresist Application (Spinning) 181
The Static Dispense Spin Process 181
Dynamic Dispense 183
Moving-Arm Dispensing 183
Manual Spinners 183
Automatic Spinners 184
Edge Bead Removal 185
Backside Coating 185
Soft Bake 185
Convection Ovens 186
Manual Hot Plates 187
In-Line, Single-Wafer Hot Plates 187
Moving-Belt Hot Plates 187
Moving-Belt Infrared Ovens 188
Microwave Baking 188
Vacuum Baking 188
Alignment and Exposure 189
Alignment and Exposure Systems 189
Exposure Sources 191
Alignment Criteria 191
Aligner Types 193
Postexposure Bake 196
Advanced Lithography 198
Review Topics 198
References 198
9 The Ten-Step Patterning Process—Developing to Final Inspection 201
Introduction 201
Development 201
Positive Resist Development 201
Negative Resist Development 203
Wet Development Processes 203
Dry (or Plasma) Development 206
Hard Bake 207
Hard-Bake Methods 207
Hard-Bake Process 207
Develop Inspect 208
Develop Inspect Reject Categories 209
Develop Inspect Methods 209
Causes for Rejecting at the Develop Inspection Stage 211
Etch 212
Wet Etching 212
Etch Goals and Issues 212
Incomplete Etch 212
Overetch and Undercutting 213
Selectivity 214
Wet-Spray Etching 214
Silicon Wet Etching 214
Silicon Dioxide Wet Etching 215
Aluminum-Film Wet Etching 216
Deposited-Oxide Wet Etching 216
Silicon Nitride Wet Etching 216
Vapor Etching 217
Dry Etch 217
Plasma Etching 218
Etch Rate 220
Radiation Damage 220
Selectivity 220
Ion-Beam Etching 222
Reactive Ion Etching 222
Resist Effects in Dry Etching 223
Resist Stripping 223
Wet Chemical Stripping of Nonmetallized Surfaces 224
Wet Chemical Stripping of Metallized Surfaces 225
Dry Stripping 225
Post–Ion Implant and Plasma Etch Stripping 226
New Stripping Challenges 226
Final Inspection 227
Mask Making 227
Summary 229
Review Topics 229
References 230
10 Next Generation Lithography 233
Introduction 233
Challenges of Next Generation Lithography 233
High-Pressure Mercury Lamp Sources 235
Excimer Lasers 236
Extreme Ultraviolet 236
X-Rays 237
Electron Beam or Direct Writing 238
Numerical Aperture of a Lens 240
Other Exposure Issues 241
Variable Numerical Aperture Lenses 242
Immersion Exposure System 242
Amplified Resist 242
Contrast Effects 243
Other Resolution Challenges and Solutions 244
Off-Axis Illumination 245
Lens Issues and Reection Systems 245
Phase-Shift Masks 245
Optical Proximity Corrected or Optical Process Correction 245
Annular-Ring Illumination 246
Pellicles 247
Surface Problems 248
Resist Light Scattering 248
Subsurface Reectivity 248
Antireective Coatings 249
Standing Waves 249
Planarization 251
Photoresist Process Advances 252
Multilayer Resist or Surface Imaging 252
Silylation or DESIRE Process 254
Polyimide Planarization Layers 255
Etchback Planarization 256
Dual-Damascene Process 256
Chemical Mechanical Polishing 256
Slurry 259
Polishing Rates 259
Planarity 260
Post-CMP Clean 261
CMP Tools 261
CMP Summary 262
Reow 262
Image Reversal 262
Contrast Enhancement Layers 262
Dyed Resists 264
Improving Etch Denition 264
Lift-Off Process 264
Self-Aligned Structures 264
Etch Prole Control 266
Review Topics 266
References 266
11 Doping 269
Introduction 269
The Diffusion Concept 269
Formation of a Doped Region and Junction 271
The N-P Junction 272
Doping Process Goals 273
Graphical Representation of Junctions 273
Concentration versus Depth Graphs 273
Lateral Diffusion 273
Same-Type Doping 275
Diffusion Process Steps 275
Deposition 275
Dopant Sources 278
Drive-In Oxidation 280
Oxidation Effects 281
Introduction to Ion Implantation 281
Concept of Ion Implantation 283
Ion-Implantation System 284
Implant Species Sources 284
Ionization Chamber 284
Mass Analyzing or Ion Selection 284
Acceleration Tube 286
Wafer Charging 286
Beam Focus 287
Neutral Beam Trap 287
Beam Scanning 287
End Station and Target Chamber 289
Ion-Implant Masks 290
Dopant Concentration in Implanted Regions 291
Crystal Damage 292
Annealing and Dopant Activation 292
Channeling 293
Evaluation of Implanted Layers 294
Uses of Ion Implantation 295
The Future of Doping 297
Review Topics 297
References 298
12 Layer Deposition 299
Introduction 299
Film Parameters 301
Chemical Vapor Deposition Basics 302
Basic CVD System Components 303
CVD Process Steps 305
CVD System Types 305
Atmospheric-Pressure CVD Systems 306
Horizontal-Tube Induction-Heated APCVD 306
Barrel Radiant-Induction-Heated APCVD 307
Pancake Induction-Heated APCVD 307
Continuous Conduction-Heated APCVD 308
Horizontal Conduction-Heated APCVD 309
Low-Pressure Chemical Vapor Deposition 309
Horizontal Conduction-Convection-Heated LPCVD 309
Ultra-High Vacuum CVD 310
Plasma-Enhanced CVD (PECVD) 310
High-Density Plasma CVD 312
Atomic Layer Deposition 313
Vapor-Phase Epitaxy 315
Molecular Beam Epitaxy 315
Metalorganic CVD 317
Deposited Films 318
Deposited Semiconductors 318
